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公开(公告)号：US20250155941A1
公开(公告)日：2025-05-15
申请号：US18389247
申请日：2023-11-14
Applicant: SMART Modular Technologies, Inc.
Inventor： Jinying Shen , Torry Steed , Andrew Mills
IPC: G06F1/3234
Abstract: An energy source for a memory device is disclosed. In particular, a memory device such as an insertable memory card may include a detachable portion that has an energy source positioned thereon. The junction between the primary portion and the detachable portion includes sufficient conductors to convey power from the energy source as well as any needed control signals. In an exemplary aspect, the detachable portion is positioned relative to the primary portion such that the detachable portion may be readily removed while the memory device is installed in a computing device. By providing a detachable energy source, the energy source may readily be replaced in the event of failure without having to replace the entirety of the memory device. Such flexibility may save time, money, and otherwise simplify design requirements.
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公开(公告)号：US12254188B1
公开(公告)日：2025-03-18
申请号：US18239376
申请日：2023-08-29
Applicant: SMART Modular Technologies, Inc.
Inventor： Andrew Mills , Torry Steed
IPC: G06F3/06
Abstract: Systems and methods for memory snapshots are disclosed. In particular, a memory device may include a volatile section and a backup persistent storage section. A snapshot manager circuit is positioned between a host control circuit or central processors. This snapshot manager circuit acts as a memory virtualization layer within the memory device and may use a redirect on write type command to put a snapshot of actively changed memory to a reserved memory area in the volatile section. A background function may copy the snapshots to the persistent storage section. Because the snapshot manager circuit is in the hardware memory access layers of the memory device, operation of the application is not interrupted or paused to access the specific memory sections. Further, snapshots are more readily available in the memory used by the host control circuit.
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Patent Agency Ranking
公开(公告)号：US20250132290A1
公开(公告)日：2025-04-24
申请号：US18383108
申请日：2023-10-24
Applicant: SMART Modular Technologies, Inc.
Inventor： Satyanarayan Iyer , Torry Steed
IPC: H01L25/065 , H01L23/31 , H01L23/498 , H10B80/00
Abstract: Memory packages are employed in computer processing systems to house memory chips that store data for a processing circuit. The memory chips consume power each time they are accessed, which may be thousands of times per second, which generates heat that needs to be dissipated to avoid high temperatures that may damage memory circuits in the memory chips. The memory packages may include at least one memory chip disposed on a substrate. The memory packages may also include an active cooling device disposed between the memory chips and a package surface to actively conduct heat from the memory chips to the package surface, where it may be dissipated. The active cooling device May be on an opposite side of the memory chips from the substrate or may be disposed in a cavity in the substrate.
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公开(公告)号：US20240134757A1
公开(公告)日：2024-04-25
申请号：US18400185
申请日：2023-12-29
Applicant: SMART Modular Technologies, Inc.
Inventor： Torry Steed , Kelvin Marino , Jinying Shen , Itsik Yomorta
CPC classification number: G06F11/1469 , G06F1/263 , G06F1/30 , G06F11/1451
Abstract: Systems and methods for enabling serial attached Non-Volatile (NV) memory are provided. In some embodiments, a method of operation of a computing system includes: in an NV Random Access Memory module (NVRAM) having a non-volatile device, a volatile memory device with data, a NV Controller unit (NVC), and a serial host interface, the method includes: receiving a request for data on the serial host interface and providing the requested data, from the volatile memory device, on the serial host interface. The method also includes: detecting a disruptive volatile memory event; copying the data of the volatile memory device to the NV device through the serial host interface based on the disruptive volatile memory event; and restoring the data of the volatile memory device from the NV device through the serial host interface. In this way, Dynamic Random-Access Memory (DRAM) level endurance and speed/latency can be provided while making it NV.
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公开(公告)号：US20250077447A1
公开(公告)日：2025-03-06
申请号：US18238826
申请日：2023-08-28
Applicant: SMART Modular Technologies, Inc.
Inventor： Torry Steed , Andrew Mills
Abstract: Systems and methods for balancing memory speeds are disclosed. In particular, at start up, a host to memory bus speed is determined and compared to a default internal memory device bus speed. A memory device control circuit may then determine if an internal bus should be overclocked or slowed down to match the host to memory bus speed. The selection may then be stored in a register and made available to a host memory controller (e.g., through polling or the like). Selection of an internal speed may also be based on other factors such as power savings or the like. In either event, having the flexibility to set the internal speed based on one or more such criteria may result in improved efficiency.
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公开(公告)号：US20250076939A1
公开(公告)日：2025-03-06
申请号：US18240402
申请日：2023-08-31
Applicant: SMART Modular Technologies, Inc.
Inventor： Satyanarayan Iyer , Torry Steed , Luis Fukazawa
Abstract: Memory modules comprise memory chips coupled to a surface of one or more substrates. The memory chips contain large numbers of storage cells that consume power during normal operation, generating heat in the memory chips and causing temperatures to increase. As the temperatures increase, leakage currents can increase in the memory chips, and performance of the memory chips can decrease. A memory module includes memory chips disposed on a substrate and an active cooling device disposed on the substrate to increase the rate at which heat is dissipated to reduce or maintain temperatures and thereby save power and improve performance. In some examples, the active cooling device is disposed on a side of a memory chip opposite to the card in the memory module to improve cooling of the memory chips. In some examples, the active cooling device is a thermoelectric device.
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公开(公告)号：US20250077089A1
公开(公告)日：2025-03-06
申请号：US18239376
申请日：2023-08-29
Applicant: SMART Modular Technologies, Inc.
Inventor： Andrew Mills , Torry Steed
IPC: G06F3/06
Abstract: Systems and methods for memory snapshots are disclosed. In particular, a memory device may include a volatile section and a backup persistent storage section. A snapshot manager circuit is positioned between a host control circuit or central processors. This snapshot manager circuit acts as a memory virtualization layer within the memory device and may use a redirect on write type command to put a snapshot of actively changed memory to a reserved memory area in the volatile section. A background function may copy the snapshots to the persistent storage section. Because the snapshot manager circuit is in the hardware memory access layers of the memory device, operation of the application is not interrupted or paused to access the specific memory sections. Further, snapshots are more readily available in the memory used by the host control circuit.
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