公开(公告)号：US20240243731A1

公开(公告)日：2024-07-18

申请号：US18559562

申请日：2022-11-08

Applicant: SOUTH CHINA UNIVERSITY OF TECHNOLOGY

Inventor： Zhijian CHEN ,  Bin LI ,  Guangyin FENG ,  Shan GAO ,  Zhaohui WU

IPC: H03H11/04 ,  H03F3/45 ,  H03H11/12

CPC classification number: H03H11/0472 ,  H03F3/45475 ,  H03H11/1204 ,  H03F2200/261 ,  H03F2200/375

Abstract: A calibration method and a tuning method for an on-chip differential active RC filter are provided. The calibration method comprises: obtaining zero-crossing time of a differential signal outputted by a single-pole point real number filter by analyzing the single-pole point real number filter; setting a reference clock period according to the relationship between the zero-crossing time and the bandwidth of the single-pole point real number filter, and setting a calibration working time sequence according to the reference clock period; and scanning an RC configuration of an RC array according to the calibration working time sequence to realize calibration of the RC array.

公开(公告)号：US20220181974A1

公开(公告)日：2022-06-09

申请号：US17604765

申请日：2019-08-19

Applicant: SOUTH CHINA UNIVERSITY OF TECHNOLOGY

Inventor： Yuyang LIU ,  Bin LI ,  Yanqi ZHENG ,  Zhaohui WU

IPC: H02M3/158 ,  H02M1/00 ,  H02M1/14

Abstract: This disclosure discloses a single-inductor multiple-output DC-DC buck converter, which includes a power conversion unit and i charge controllers, as well as a phase-locked loop, a logic unit, a driving unit, and an input trunk duty ratio generation unit. The charge controllers are connected to the driving unit through the logic unit. The logic unit is further connected to the phase-locked loop and the phase-locked loop is connected to the driving unit through the input trunk duty ratio generation unit. The driving unit is connected to the power conversion unit. The disclosure applies charge control to every output branch path, and adopts a phase-locked loop as the cycle control, which effectively suppresses the cross modulation effect of every branch path, and does not require the last branch path to have a sufficiently heavy load, which broadens the load range, while taking into account other performance requirements concurrently.

公开(公告)号：US20230274061A1

公开(公告)日：2023-08-31

申请号：US17601432

申请日：2021-07-09

Applicant: SOUTH CHINA UNIVERSITY OF TECHNOLOGY

Inventor： Bin LI ,  Dan LU ,  Zhaohui WU

IPC: G06F30/36

CPC classification number: G06F30/36 ,  G06F2119/08

Abstract: A method and system for modeling, simulating, and optimizing a FinFET device based on self-heating effect are provided. The method includes: building and electrically simulating a FinFET device model based on general data through simulation software; thermally simulating the FinFET device model to obtain a thermal parameter; modifying a simulated ambient temperature according to the thermal parameter and modifying the electrical characteristic parameter of the FinFET device model in an environment where a FinFET device is affected by self-heating; and finally building the FinFET device model based on self-heating effect. The method and system for modeling, simulating, and optimizing the FinFET device based on self-heating effect in disclosure provides lowered errors of device simulation, improved modeling precision, and enhanced accuracy of reliability analyses when being compared with conventional modeling without considering the self-heating effect.

公开(公告)号：US20220294459A1

公开(公告)日：2022-09-15

申请号：US17742336

申请日：2022-05-11

Applicant: SOUTH CHINA UNIVERSITY OF TECHNOLOGY

Inventor： Zhijian CHEN ,  Ziying WU ,  Changjian ZHOU ,  Pengfei YU ,  Bin LI ,  Shaolin ZHOU

IPC: H03L7/099 ,  H03L7/085 ,  H03L7/081

Abstract: A frequency locking method for a phase-locked loop comprises the following steps: S1, a frequency control module controls a numerically controlled oscillator to obtain an maximum output frequency and a minimum output frequency; S2, obtain a minimum frequency ratio and a maximum frequency ratio by means of a time-to-digital converter and the frequency control module; S3, calculate a first frequency control word and a first frequency ratio according to the minimum frequency ratio and the maximum frequency ratio; S4, the frequency control module uses the Newton's iterative method to recalculate a new frequency control word; S5, obtain a new frequency ratio according to the new frequency control word; S6, if the new frequency ratio is within an error range, end iteration and stably output the new frequency control word, and otherwise, jump to step S4.

公开(公告)号：US20220115998A1

公开(公告)日：2022-04-14

申请号：US17428637

申请日：2019-03-25

Applicant: SOUTH CHINA UNIVERSITY OF TECHNOLOGY

Inventor： Zhiming LIANG ,  Bin LI ,  Zhaohui WU

IPC: H03F3/387 ,  H03F3/45

Abstract: A chopper amplifying circuit employing a negative impedance compensation technique, including a differential input end, a first-level chopper switch, a first-level amplifying circuit, a second-level chopper switch, a second-level amplifying circuit, a negative impedance converting circuit, a negative feedback unit, an input capacitor, and a differential output end, is provided. The differential input end is connected to the first-level chopper switch. An output terminal of the first-level chopper switch is connected to the first-level amplifying circuit through the input capacitor. The first-level amplifying circuit is connected to the second-level chopper switch, which is connected to the second-level amplifying circuit. The second-level amplifying circuit is connected to the differential output end, and is also connected to a feedback input end of the first-level amplifying circuit through the negative feedback unit. The negative impedance converting circuit is parallel-connected to a signal input end of the first-level amplifying circuit.

公开(公告)号：US20170358392A1

公开(公告)日：2017-12-14

申请号：US15529517

申请日：2015-12-19

Applicant: SOUTH CHINA UNIVERSITY OF TECHNOLOGY

Inventor： Xiuyin ZHANG ,  Chengdai XUE ,  Bin LI

IPC: H01F27/34 ,  H01F27/28 ,  H02J50/10 ,  H02J50/70

CPC classification number: H01F27/34 ,  H01F27/28 ,  H01F38/14 ,  H02J50/10 ,  H02J50/12 ,  H02J50/70 ,  H04B5/0012 ,  H04B5/0037 ,  H04B5/0075

Abstract: A wireless power transfer coil system using offset of electric and magnetic coupling for frequency splitting suppression, which includes one transmitting coil, one receiving coil and four loaded annular metal sheets, is provided. A first annular metal sheet and a second annular metal sheets of the four loaded annular metal sheets are loaded between the transmitting coil and a third and a fourth annular metal sheets of the four loaded annular metal sheets are loaded between the receiving coil to expand a variable distance range of a power transmission. The coil system enables the coils to worked in a state of magnetic and electric coupling. During a process of moving from a long distance to a short distance, a coupling coefficient between the coils changes gradually, but a low coupling degree is still maintained so that a phenomenon of frequency splitting is not produced, thereby maintaining a high-efficiency power transmission within the system.

公开(公告)号：US20220182021A1

公开(公告)日：2022-06-09

申请号：US17593844

申请日：2019-12-31

Applicant: SOUTH CHINA UNIVERSITY OF TECHNOLOGY

Inventor： Rongsheng CHEN ,  Houbo FAN ,  Guoyuan LI ,  Yuming XU ,  Yuning QIN ,  Zhaohui WU ,  Bin LI

IPC: H03F1/34 ,  H03G3/30

Abstract: The present disclosure discloses a thin film transistor (TFT)-based bootstrap structure amplifier, and a chip. The amplifier includes an input circuit, an output buffer, and several bootstrap structure units. The bootstrap structure units include a TFT and a capacitor. The drain and the gate of the TFT are both connected to the same voltage node. The source of the TFT is connected to one end of the capacitor. The other end of the capacitor is connected to an output signal node. The output buffer is formed by connecting the sources and drains of several TFTs in series. Two ends of the output buffer are respectively connected to an input voltage node and an output signal node. The source of the TFT in each bootstrap structure unit is connected to the gates of the TFTs in one output buffer. The input circuit includes an input signal node, the output signal node, and a grounding node. The present disclosure can increase circuit gain and have a simple structure and low fabrication cost. The present disclosure can be widely applied to the field of integrated circuits.