Identifying fixed bits of a bitstring format

    公开(公告)号:US11423247B2

    公开(公告)日:2022-08-23

    申请号:US16839982

    申请日:2020-04-03

    Abstract: Techniques are disclosed for identifying fixed bits of a bitstring format. One or more processors are configured to generate a first bitstring having respective first bit values that have a first satisfiability state and generate a second bitstring having respective second bit values that have a second satisfiability state. The one or more processors are configured to identify first potential free bits having respective first common values and generate a third bitstring having first potential free bits with the respective first common values and third remaining bits. The one or more processors are configured to identify second potential free bits having respective second common values and identify a fixed bit that is not included in the first potential free bits and is not included in the second potential free bits.

    Trusted neural network system
    3.
    发明授权

    公开(公告)号:US11651227B2

    公开(公告)日:2023-05-16

    申请号:US16226286

    申请日:2018-12-19

    CPC classification number: G06N3/084 G06N3/0454

    Abstract: In general, the disclosure describes techniques for facilitating trust in neural networks using a trusted neural network system. For example, described herein are multi-headed, trusted neural network systems that can be trained to satisfy one or more constraints as part of the training process, where such constraints may take the form of one or more logical rules and cause the objective function of at least one the heads of the trusted neural network system to steer, during machine learning model training, the overall objective function for the system toward an optimal solution that satisfies the constraints. The constraints may be non-temporal, temporal, or a combination of non-temporal and temporal. The constraints may be directly compiled to a neural network or otherwise used to train the machine learning model.

    MULTIPATH VERIFICATION OF DATA TRANSFORMS IN A SYSTEM OF SYSTEMS

    公开(公告)号:US20220197881A1

    公开(公告)日:2022-06-23

    申请号:US17644946

    申请日:2021-12-17

    Abstract: Processing circuitry is configured to obtain a data structure that defines a plurality of conversions of data between pairs of fields; perform a search to identify a plurality of paths from a source node of the data structure to a destination node of the data structure, wherein the source node corresponds to a first field of the fields and the destination node corresponds to a second field of the fields; convert, for each path of the plurality of paths, transforms represented by corresponding edges of the path to a sequence of transforms that conform to a solver format; process the sequence of transforms for each path to determine whether all paths of the plurality of paths are equivalent up to an equivalence relation; and output an indication of whether all paths of the plurality of paths are equivalent up to an equivalence relation.

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