公开(公告)号：US20150101846A1

公开(公告)日：2015-04-16

申请号：US14160209

申请日：2014-01-21

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： Ho Shik Kang ,  Jong Tae Park

IPC: H05K1/02 ,  H05K3/00 ,  H05K3/46

CPC classification number: H05K3/4647 ,  H05K3/007 ,  H05K2201/029 ,  H05K2201/09136 ,  H05K2203/025

Abstract: Disclosed herein are a printed circuit board and a method of manufacturing the same. The printed circuit board according to the present invention may include: a plurality of circuit layers; and a plurality of insulating layers interposed between the plurality of circuit layers, wherein two adjacent insulating layers of the plurality of insulating layers have different thicknesses.

Abstract translation: 这里公开了一种印刷电路板及其制造方法。 根据本发明的印刷电路板可以包括：多个电路层; 以及插入在所述多个电路层之间的多个绝缘层，其中所述多个绝缘层中的两个相邻的绝缘层具有不同的厚度。

公开(公告)号：US09516740B2

公开(公告)日：2016-12-06

申请号：US14108517

申请日：2013-12-17

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： Doo Hwan Lee ,  Tae Kyun Bae ,  Ho Shik Kang

IPC: H05K1/18 ,  H05K1/02 ,  H05K3/46 ,  H01L23/00

CPC classification number: H05K1/0271 ,  H01L24/19 ,  H01L24/25 ,  H01L2224/04105 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/19 ,  H01L2224/2518 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/83005 ,  H01L2224/92244 ,  H01L2924/3511 ,  H05K1/185 ,  H05K3/4697 ,  H05K2201/068 ,  Y10T29/49139 ,  Y10T156/10

Abstract: The present invention can reduce warpage while minimizing unnecessary wiring of an electronic component embedded substrate by including an electronic component; a first wiring layer; and a second wiring layer, wherein at least one of the number of layers and wiring density of the first wiring layer is greater than at least one of the number of layers and wiring density of the second wiring layer and a first insulating portion is made of a material having a lower coefficient of thermal expansion than a second insulating portion.

Abstract translation: 通过包括电子部件，本发明可以减少电子部件嵌入式基板的不必要布线，同时减少翘曲; 第一布线层; 以及第二布线层，其中所述第一布线层的多个层数和布线密度中的至少一个大于所述第二布线层和所述第一绝缘部分的层数和布线密度中的至少一个， 具有比第二绝缘部分低的热膨胀系数的材料。

公开(公告)号：US09307632B2

公开(公告)日：2016-04-05

申请号：US14143527

申请日：2013-12-30

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Doo Hwan Lee ,  Ho Shik Kang ,  Yee Na Shin ,  Yul Kyo Chung ,  Seung Eun Lee

IPC: H05K1/02 ,  H05K3/30 ,  H05K3/46 ,  H05K1/18 ,  H01L23/00 ,  H05K3/00

CPC classification number: H05K1/0271 ,  H01L21/568 ,  H01L24/18 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/19 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/15311 ,  H01L2924/3511 ,  H05K1/185 ,  H05K3/0097 ,  H05K3/4682 ,  H05K3/4688 ,  H05K2201/0175 ,  H05K2201/068 ,  H05K2203/0152 ,  H05K2203/1572 ,  Y10T29/4913 ,  Y10T29/49155 ,  H01L2224/83005

Abstract: A multilayered substrate and a method of manufacturing the same. The multilayered substrate includes a plurality of wiring layers and reinforcing layers disposed at the outermost portions of both surfaces of the multilayered substrate, respectively, in order to decrease warpage of the multilayered substrate and has wiring patterns optimized depending on a scheme in which external electrodes are formed on an electronic component.

Abstract translation: 一种多层基板及其制造方法。 多层基板包括分别设置在多层基板的两个表面的最外部的多个布线层和加强层，以减少多层基板的翘曲，并且具有根据外部电极为 形成在电子元件上。

公开(公告)号：US20150101852A1

公开(公告)日：2015-04-16

申请号：US14499184

申请日：2014-09-28

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jong Tae PARK ,  Ho Shik Kang

IPC: H05K1/11 ,  H05K3/04 ,  H05K1/09

CPC classification number: H05K1/115 ,  H05K3/0097 ,  H05K3/108 ,  H05K3/426 ,  H05K3/428 ,  H05K3/465 ,  H05K2201/0347 ,  H05K2201/09472 ,  H05K2201/09545 ,  H05K2201/09563 ,  H05K2203/1536 ,  Y10T29/49165

Abstract: Disclosed herein are a printed circuit board and a method of manufacturing the same.The printed circuit board according to a preferred embodiment of the present invention may include: an insulating layer; a first via depressed from one surface of the insulating layer; a second via depressed from the other surface of the insulating layer; and a circuit pattern formed in the insulating layer and bonded to the first and second vias.

Abstract translation: 这里公开了一种印刷电路板及其制造方法。 根据本发明的优选实施例的印刷电路板可以包括：绝缘层; 从所述绝缘层的一个表面凹陷的第一通孔; 从所述绝缘层的另一表面压下的第二通孔; 以及形成在绝缘层中并结合到第一和第二通孔的电路图案。

公开(公告)号：US20150062848A1

公开(公告)日：2015-03-05

申请号：US14108517

申请日：2013-12-17

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： Doo Hwan LEE ,  Tae Kyun BAE ,  Ho Shik Kang

IPC: H05K1/18 ,  H05K3/32

CPC classification number: H05K1/0271 ,  H01L24/19 ,  H01L24/25 ,  H01L2224/04105 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/19 ,  H01L2224/2518 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/83005 ,  H01L2224/92244 ,  H01L2924/3511 ,  H05K1/185 ,  H05K3/4697 ,  H05K2201/068 ,  Y10T29/49139 ,  Y10T156/10

Abstract: The present invention can reduce warpage while minimizing unnecessary wiring of an electronic component embedded substrate by including an electronic component; a first wiring layer; and a second wiring layer, wherein at least one of the number of layers and wiring density of the first wiring layer is greater than at least one of the number of layers and wiring density of the second wiring layer and a first insulating portion is made of a material having a lower coefficient of thermal expansion than a second insulating portion.

Abstract translation: 通过包括电子部件，本发明可以减少电子部件嵌入式基板的不必要布线，同时减少翘曲; 第一布线层; 以及第二布线层，其中所述第一布线层的多个层数和布线密度中的至少一个大于所述第二布线层和所述第一绝缘部分的层数和布线密度中的至少一个， 具有比第二绝缘部分低的热膨胀系数的材料。