公开(公告)号：US12106189B2

公开(公告)日：2024-10-01

申请号：US17087935

申请日：2020-11-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dongjin Lee ,  Rezwana Karim ,  Rishikesh Sanjay Ghewari ,  Dongyun Jin

IPC: G06N20/00 ,  G06F17/18 ,  G06F18/211 ,  G06F18/241 ,  G06F18/2431

CPC classification number: G06N20/00 ,  G06F17/18 ,  G06F18/211 ,  G06F18/241 ,  G06F18/2431

Abstract: Training a machine learning model includes electronically retrieving feature vectors that comprise a electronic representations of multidimensional observations, each observation uniquely associated with a predetermined observation value. A multi-class data structure comprising a plurality of buckets is generated by binning the observation values associated with the multidimensional observations. Each bucket corresponds to a range of values and contains observations whose associated observation values lie within the range. A machine learning model is trained using the feature vectors to classify feature vector inputs, assigning each feature vector input to a bucket. Simulated execution of the machine learning model classifies simulation feature vectors by assigning each simulation feature vector to a bucket based on the feature. For each bucket, a regression value is determined based on an aggregation of simulation feature vectors assigned to the bucket, thereby enabling the machine learning model to predict regression values corresponding to subsequent feature vector inputs.

公开(公告)号：US20240196622A1

公开(公告)日：2024-06-13

申请号：US18514436

申请日：2023-11-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kangoh Yun ,  Sohyun Lee ,  Dongjin Lee ,  Junhee Lim

IPC: H10B43/40 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18 ,  H10B41/41 ,  H10B80/00

CPC classification number: H10B43/40 ,  H01L24/08 ,  H01L25/0657 ,  H01L25/18 ,  H10B41/41 ,  H10B80/00 ,  H01L2224/08145 ,  H01L2924/1431 ,  H01L2924/14511

Abstract: A semiconductor device includes a substrate including an active region including a central active region extending in a first direction and first to fourth extended active regions extending from an edge of the central active region in a second direction perpendicular to the first direction, and a device isolation layer defining the active region; and first to fourth gate structures on the active region and spaced apart from one another, wherein the central active region, the first to fourth extended active regions, and the first to fourth gate structures constitute first to fourth pass transistors, the first to fourth pass transistors share one drain region on the central active region, and the active region has an H shape in a plan view.

公开(公告)号：US11954162B2

公开(公告)日：2024-04-09

申请号：US17039305

申请日：2020-09-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dongjin Lee ,  Dongyun Jin ,  Rezwana Karim ,  Zhi Nie ,  Rishikesh Ghewari ,  Yinan Li ,  Mingyang Wang

IPC: G06F16/9535 ,  G06F16/28 ,  G06F16/9538

CPC classification number: G06F16/9535 ,  G06F16/287 ,  G06F16/9538

Abstract: A client device can identify user data pertaining to use of the client device by a user. The client device can determine at least one persona trait of the user based on the user data pertaining to the use of the client device by the user. The client device can receive persona categorization data, the persona categorization data specifying a plurality of persona categories and, for each persona category, a plurality of persona traits. Based on the at least one determined persona trait, the client device can assign the user to a persona category selected from the plurality of persona categories. Based on the persona category to which the user is assigned, the client device can identify information to present to users who are assigned to the persona category to which the user is assigned. The client device can present to the user the identified information.

公开(公告)号：US11676914B2

公开(公告)日：2023-06-13

申请号：US17216279

申请日：2021-03-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hwayoung Lee ,  Heejae Nam ,  Byungmoon Bae ,  Junggeun Shin ,  Hyunsu Sim ,  Junho Yoon ,  Dongjin Lee

IPC: H01L23/544 ,  H01L23/00 ,  H01L21/78

CPC classification number: H01L23/562 ,  H01L21/78 ,  H01L23/544 ,  H01L2223/5446

Abstract: A semiconductor substrate may include a plurality of semiconductor chips and a protection pattern. The semiconductor chips may be divided by two scribe lanes intersecting each other. Corners of the semiconductor chips may be disposed at the intersection of the two scribe lanes. The protection pattern may be arranged at the intersection of the scribe lanes to surround the corners of the semiconductor chips. Thus, the corners of the semiconductor chips may be protected by the protection pattern form colliding with each other in a following grinding process.

公开(公告)号：US20220138618A1

公开(公告)日：2022-05-05

申请号：US17087935

申请日：2020-11-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dongjin Lee ,  Rezwana Karim ,  Rishikesh Sanjay Ghewari ,  Dongyun Jin

IPC: G06N20/00 ,  G06K9/62 ,  G06F17/18

Abstract: Training a machine learning model includes electronically retrieving feature vectors that comprise a electronic representations of multidimensional observations, each observation uniquely associated with a predetermined observation value. A multi-class data structure comprising a plurality of buckets is generated by binning the observation values associated with the multidimensional observations. Each bucket corresponds to a range of values and contains observations whose associated observation values lie within the range. A machine learning model is trained using the feature vectors to classify feature vector inputs, assigning each feature vector input to a bucket. Simulated execution of the machine learning model classifies simulation feature vectors by assigning each simulation feature vector to a bucket based on the feature. For each bucket, a regression value is determined based on an aggregation of simulation feature vectors assigned to the bucket, thereby enabling the machine learning model to predict regression values corresponding to subsequent feature vector inputs.

公开(公告)号：US10325992B2

公开(公告)日：2019-06-18

申请号：US14854272

申请日：2015-09-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eunae Cho ,  Dongjin Lee ,  Ji Eun Lee ,  Kyoung-Ho Jung ,  Dong Su Ko ,  Yongsu Kim ,  Jiho Yoo ,  Sung Heo ,  Hyun Park ,  Satoru Yamada ,  Moonyoung Jeong ,  Sungjin Kim ,  Gyeongsu Park ,  Han Jin Lim

IPC: H01L29/423 ,  H01L29/49 ,  H01L21/28 ,  H01L29/51

Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate including a trench. The semiconductor device further includes a gate electrode disposed in the trench, and a gate insulating film disposed between the substrate and the gate electrode. The gate electrode includes a gate conductor and a metal element, and an effective work function of the gate electrode is less than an effective work function of the gate conductor.

公开(公告)号：US09905659B2

公开(公告)日：2018-02-27

申请号：US15011820

申请日：2016-02-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongjin Lee ,  Junsoo Kim ,  Moonyoung Jeong ,  Satoru Yamada ,  Dongsoo Woo ,  Jiyoung Kim

IPC: H01L29/40 ,  H01L29/423 ,  H01L27/108 ,  H01L27/088

CPC classification number: H01L29/402 ,  H01L27/088 ,  H01L27/10876 ,  H01L29/42392

Abstract: A semiconductor device may include a device isolation region configured to define an active region in a substrate, an active gate structure disposed in the active region, and a field gate structure disposed in the device isolation region. The field gate structure may include a gate conductive layer. The active gate structure may include an upper active gate structure including a gate conductive layer and a lower active gate structure formed under the upper active gate structure and vertically spaced apart from the upper active gate structure. The lower active gate structure may include a gate conductive layer. A top surface of the gate conductive layer of the field gate structure is located at a lower level than a bottom surface of the gate conductive layer of the upper active gate structure.

公开(公告)号：US09626259B2

公开(公告)日：2017-04-18

申请号：US14337882

申请日：2014-07-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hwan-Jin Yong ,  Donghyun Song ,  Janghwan Kim ,  Young-Goo Ko ,  Hyuck-Sun Kwon ,  Taek-Sung Kim ,  Kwang-Ho Kim ,  Byungjin Ahn ,  Dongjin Lee ,  Byungse So ,  Jong-Gyu Park ,  Kyoungsub Oh ,  Kwan-Jong Park ,  Jong-Soo Seo ,  Tae-Hwa Yoo ,  Min-Ho Kim

IPC: G06F11/20 ,  G06F1/30 ,  G06F11/14 ,  G06F1/28

CPC classification number: G06F11/2015 ,  G06F1/28 ,  G06F1/305 ,  G06F11/1441 ,  G06F2201/85

Abstract: A user device is provided. The device includes a main power supply, and an auxiliary power supply. The main power supply provides a main power. The auxiliary power supply cuts off the main power according to a power level of the main power supply and provides an auxiliary power upon Sudden Power-Off (SPO).

公开(公告)号：US09542199B2

公开(公告)日：2017-01-10

申请号：US14508393

申请日：2014-10-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin Gyu Heo ,  Donggi Lee ,  Seongsik Hwang ,  Dongjin Lee ,  Jeong Woo Lee ,  Wonmoon Cheon ,  Seungho Lim ,  Jong-Min Kim ,  Jae-Hwa Lee ,  Haeri Lee ,  Woonhyug Jee

IPC: G06F12/02 ,  G06F9/44 ,  G06F13/16

CPC classification number: G06F9/4403 ,  G06F9/4406 ,  G06F12/0246 ,  G06F13/1673 ,  G06F2212/7201 ,  Y02D10/13 ,  Y02D10/14

Abstract: One embodiment of a method includes loading, by a memory controller, a boot image from a solid state drive to an operating memory of a computing system during an initialization operation of the computing system. The initialization operation initializes components of the computing system.

Abstract translation: 方法的一个实施例包括在计算系统的初始化操作期间由存储器控制器将启动映像从固态驱动器加载到计算系统的操作存储器。 初始化操作初始化计算系统的组件。

公开(公告)号：US12298676B2

公开(公告)日：2025-05-13

申请号：US18322161

申请日：2023-05-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Injae Lee ,  Sungyong Bae ,  Daegeun Yoon ,  Inho Choi ,  Sunghyup Kim ,  Euishin Kim ,  Jeonggil Kim ,  Yebin Nam ,  Dongjin Lee ,  Jonggu Lee ,  Dohyun Jung ,  Dongsik Jeong

IPC: G03F7/00 ,  H01L21/68

Abstract: A substrate processing apparatus includes a table in an exposure chamber that is configured to perform an exposure process on a semiconductor substrate, a guiding device including a first horizontal driving body slidably movable in a first horizontal direction and a guide rail on the first horizontal driving body and having a trench extending in a second horizontal direction, a positioning device connected to the guiding device, the positioning device including a slider, a second horizontal driving body and a substrate stage, the slider configured to slidably move in the second horizontal direction along the trench, the second horizontal driving body connected or fixed to the slider, the substrate stage on the second horizontal driving body and configured to support the semiconductor substrate, and a blocking member between the guide rail and the substrate stage to block an inflow of foreign substances onto the substrate stage.