公开(公告)号：US20130319739A1

公开(公告)日：2013-12-05

申请号：US13598503

申请日：2012-08-29

Applicant: Shawn X. ARNOLD

Inventor： Shawn X. ARNOLD

IPC: H01R24/00 ,  H01R43/00 ,  H05K1/00 ,  H01R13/62 ,  H05K1/16

CPC classification number: H01R12/714 ,  H01R12/732 ,  H05K1/117 ,  H05K1/142 ,  H05K3/365 ,  H05K2201/0311 ,  H05K2201/09163 ,  H05K2201/1034 ,  H05K2201/1059 ,  Y10T156/10 ,  Y10T156/1052

Abstract: A spring finger interconnection system can include a plug and a receptacle. In one embodiment, the plug can include spring finger contacts configured to carry electrical signals. The receptacle can include a cavity to receive the plug and the cavity can be constructed with printed circuit board fabrication techniques. In one embodiment, the cavity can be formed, at least in part, in a pre-impregnation layer and a first and a second layer can be disposed above and below the pre-impregnation layer to further form the cavity. In one embodiment, contacts can be arranged on the first layer to contact the spring fingers when the plug is inserted into the cavity. In another embodiment, contacts can be arranged on both the first and the second layers. In yet another embodiment, the cavity can be shaped to aid in contact-to-spring finger alignment when the plug is inserted in the cavity.

Abstract translation: 弹簧手指互连系统可以包括插头和插座。 在一个实施例中，插头可以包括配置成承载电信号的弹簧爪触点。 容器可以包括用于接收插头的空腔，并且空腔可以由印刷电路板制造技术构成。 在一个实施例中，空腔可以至少部分地形成在预浸渍层中，并且可以在预浸渍层的上方和下方设置第一和第二层以进一步形成空腔。 在一个实施例中，当插头插入空腔时，触头可布置在第一层上以接触弹簧指。 在另一个实施例中，触点可以布置在第一和第二层上。 在另一个实施例中，当插头插入空腔时，空腔可被成形为有助于接触弹簧对准。

公开(公告)号：US20140085851A1

公开(公告)日：2014-03-27

申请号：US13626858

申请日：2012-09-25

Applicant: Shawn X. ARNOLD ,  Jeffrey M. THOMA

Inventor： Shawn X. ARNOLD ,  Jeffrey M. THOMA

IPC: H05K7/00 ,  H05K3/32 ,  H05K3/34 ,  H05K1/16

CPC classification number: H05K1/141 ,  H05K1/0231 ,  H05K1/111 ,  H05K3/366 ,  H05K2201/049 ,  H05K2201/10045 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/49133

Abstract: The described embodiments relate generally to electronic components and more specifically to a capacitor array that can increase component density on a printed circuit board and reduce a distance to a ground plane. An array of capacitors can be formed by coupling a group of capacitors on their sides interspersed with interposer boards. The resulting configuration can increase component density and reduce an amount of resistance and effective series inductance between a set of power decoupling capacitors and an integrated circuit.

Abstract translation: 所描述的实施例一般涉及电子部件，更具体地涉及可以增加印刷电路板上的部件密度并减小到接地平面的距离的电容器阵列。 一组电容器可以通过将一组电容器连接在插入有插入板的侧面上形成。 所得到的配置可以增加组件密度并减少一组功率去耦电容器和集成电路之间的电阻和有效串联电感量。

公开(公告)号：US20140038357A1

公开(公告)日：2014-02-06

申请号：US13604617

申请日：2012-09-05

Applicant: Shawn X. ARNOLD ,  Matthew E. LAST ,  Shankar S. PENNATHUR ,  Tan ZHANG

Inventor： Shawn X. ARNOLD ,  Matthew E. LAST ,  Shankar S. PENNATHUR ,  Tan ZHANG

IPC: H01L21/78

CPC classification number: H01L21/78 ,  H01L21/76898

Abstract: A method and apparatus is described for forming and using a stiffener for the production of thinned integrated circuits. In one embodiment, a handle can be bonded to an integrated circuit wafer before the wafer is thinned. Electrical couplings such as mounting balls can be attached to the wafer. Individual dice can be singulated from the wafer by dicing through the wafer and the handle, producing a wafer/handle assembly. The wafer/handle assembly can be mounted to a printed circuit board before the handle is de-bonded.

Abstract translation: 描述了用于形成和使用用于生产减薄集成电路的加强件的方法和装置。 在一个实施例中，在晶片变薄之前，手柄可以结合到集成电路晶片。 诸如安装球的电耦合可以附接到晶片。 可以通过切割晶片和手柄从晶片上单个晶片，从而产生晶片/手柄组件。 在把手脱扣之前，晶片/把手组件可以安装到印刷电路板上。

公开(公告)号：US20130277856A1

公开(公告)日：2013-10-24

申请号：US13588268

申请日：2012-08-17

Applicant: Shawn X. ARNOLD

Inventor： Shawn X. ARNOLD

IPC: H01L21/56 ,  G06F17/50 ,  H01L23/28

CPC classification number: H01L24/96 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/562 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2924/12042 ,  H01L2924/00

Abstract: A method for disclosing an integrated circuit embedded in a resin is disclosed. In one embodiment, stabilizing vias can be formed within the resin and can couple to corresponding pads in the integrated circuit. The stabilizing vias can be used in areas prone to failure when the combined resin/integrated circuit is stressed or undergoes some amount of displacement. In one embodiment, the stabilizing vias can be non-functional vias that do not carry electrical signals or power to or from the integrated circuit.

Abstract translation: 公开了嵌入树脂中的集成电路的公开方法。 在一个实施例中，可以在树脂内形成稳定通孔并且可以耦合到集成电路中的相应焊盘。 当组合的树脂/集成电路受到压力或经历一定量的位移时，稳定通孔可用于容易发生故障的区域。 在一个实施例中，稳定通孔可以是不携带电信号或从集成电路供电的非功能通孔。

公开(公告)号：US20130201616A1

公开(公告)日：2013-08-08

申请号：US13595976

申请日：2012-08-27

Applicant: Shawn X. ARNOLD ,  Douglas P. Kidd ,  Sean A. Mayo ,  Scott P. Mullins ,  Dennis R. Pyper ,  Jeffrey M. Thoma ,  Kenyu Tojima

Inventor： Shawn X. ARNOLD ,  Douglas P. Kidd ,  Sean A. Mayo ,  Scott P. Mullins ,  Dennis R. Pyper ,  Jeffrey M. Thoma ,  Kenyu Tojima

IPC: H05K7/06 ,  H05K3/30 ,  G06F1/16

CPC classification number: G06F1/183 ,  H01L2224/16227 ,  H01L2924/19106 ,  H05K1/0231 ,  H05K1/141 ,  H05K1/181 ,  H05K1/185 ,  H05K3/403 ,  H05K2201/10378 ,  H05K2201/10515 ,  H05K2201/1053 ,  H05K2201/10545 ,  Y02P70/611 ,  Y10T29/4913

Abstract: Stacked arrays of components are disclosed. In one embodiment, a first and a second layer of components are electrically and mechanically coupled to a thin interposer disposed between the first and second layers. The first layer can be configured to attach the stacked array to a host printed circuit board. The interposer can insulate the components from one another and also couple signals between the components on the first and second layers. In one embodiment, the components in the first and second layers are passive components.

Abstract translation: 公开了堆叠的组件阵列。 在一个实施例中，第一和第二层部件电气和机械耦合到设置在第一和第二层之间的薄插入件。 第一层可以被配置为将堆叠的阵列附接到主机印刷电路板。 插入器可以将组件彼此绝缘，并且还可以在第一层和第二层之间的组件之间耦合信号。 在一个实施例中，第一和第二层中的部件是无源部件。

公开(公告)号：US20130201615A1

公开(公告)日：2013-08-08

申请号：US13592037

申请日：2012-08-22

Applicant: Shawn X. ARNOLD ,  Douglas P. KIDD ,  Sean A. MAYO ,  Scott P. MULLINS ,  Dennis R. PYPER ,  Jeffrey M. THOMA ,  Kenyu TOJIMA

Inventor： Shawn X. ARNOLD ,  Douglas P. KIDD ,  Sean A. MAYO ,  Scott P. MULLINS ,  Dennis R. PYPER ,  Jeffrey M. THOMA ,  Kenyu TOJIMA

IPC: H05K1/18 ,  G06F1/16 ,  H05K7/06

CPC classification number: G06F1/183 ,  H01L2224/16227 ,  H01L2924/19106 ,  H05K1/0231 ,  H05K1/141 ,  H05K1/181 ,  H05K1/185 ,  H05K3/403 ,  H05K2201/10378 ,  H05K2201/10515 ,  H05K2201/1053 ,  H05K2201/10545 ,  Y02P70/611 ,  Y10T29/4913

Abstract: Stacked arrays of components are disclosed. In one embodiment, a first and a second layer of components are electrically and mechanically coupled to an interposer with an encapsulated third layer of components disposed between the first and second layers. The first layer can be configured to attach the stacked array to a host printed circuit board. The interposer can couple signals between the components on the first and second layers.

Abstract translation: 公开了堆叠的组件阵列。 在一个实施例中，第一和第二层组件通过电介质和机械耦合到具有设置在第一层和第二层之间的被封装的第三层组件的中介层。 第一层可以被配置为将堆叠的阵列附接到主机印刷电路板。 插入器可以在第一层和第二层之间的组件之间耦合信号。