Etch process for reducing directed self assembly pattern defectivity using direct current positioning
    1.
    发明授权
    Etch process for reducing directed self assembly pattern defectivity using direct current positioning 有权
    使用直流定位减少定向自组装图案缺陷的蚀刻工艺

    公开(公告)号:US09153457B2

    公开(公告)日:2015-10-06

    申请号:US14018329

    申请日:2013-09-04

    Abstract: A method for preparing a patterned directed self-assembly layer for reducing directed self-assembly pattern defectivity using direct current superpositioning is provided. A substrate having a block copolymer layer overlying a first intermediate layer, said block copolymer layer comprising a first phase-separated polymer defining a first pattern and a second phase-separated polymer defining a second pattern in said block copolymer layer is provided. A first plasma etching process using plasma formed of a first process composition to remove said second phase-separated polymer while leaving behind said first pattern of said first phase-separated polymer is performed. A second plasma etching process to transfer said first pattern into said first intermediate layer using plasma formed of a second process composition is performed. In an embodiment, said first phase-separated polymer is exposed to an electron beam preceding, during, or following said first plasma etching process, or preceding or during said second plasma etching process.

    Abstract translation: 提供了一种用于使用直流叠加来制造用于减少定向自组装图案缺陷的图案化定向自组装层的方法。 提供了具有覆盖在第一中间层上的嵌段共聚物层的基材,所述嵌段共聚物层包含限定第一图案的第一相分离聚合物和在所述嵌段共聚物层中限定第二图案的第二相分离聚合物。 执行使用由第一处理组合物形成的等离子体的第一等离子体蚀刻工艺,以除去所述第二相分离聚合物,同时留下所述第一相分离聚合物的所述第一图案。 执行使用由第二处理组合物形成的等离子体将所述第一图案转印到所述第一中间层中的第二等离子体蚀刻工艺。 在一个实施方案中,所述第一相分离聚合物在所述第一等离子体蚀刻工艺之前,期间或之后或在所述第二等离子体蚀刻工艺之前或期间暴露于电子束。

    Etch process for reducing directed self assembly pattern defectivity
    2.
    发明授权
    Etch process for reducing directed self assembly pattern defectivity 有权
    用于减少定向自组装图案缺陷的蚀刻工艺

    公开(公告)号:US08945408B2

    公开(公告)日:2015-02-03

    申请号:US13918794

    申请日:2013-06-14

    Abstract: Provided is a method for preparing a patterned directed self-assembly layer, comprising: providing a substrate having a block copolymer layer comprising a first phase-separated polymer defining a first pattern in the block copolymer layer and a second phase-separated polymer defining a second pattern in the block copolymer layer; and performing an etching process to selectively remove the second phase-separated polymer while leaving behind the first pattern of the first phase-separated polymer on the surface of the substrate, the etching process being performed at a substrate temperature less than or equal to about 20 degrees C. The method further comprises providing a substrate holder for supporting the substrate, the substrate holder having a first temperature control element for controlling a first temperature at a central region and second temperature control element at an edge region of the substrate and setting a target value for the first and the second temperature.

    Abstract translation: 提供了一种制备图案化定向自组装层的方法,包括:提供具有嵌段共聚物层的基材,所述嵌段共聚物层包含在嵌段共聚物层中限定第一图案的第一相分离聚合物和限定第二相分离聚合物的第二相分离聚合物 嵌段共聚物层中的图案; 并且执行蚀刻工艺以选择性地除去第二相分离聚合物,同时留下基材表面上的第一相分离聚合物的第一图案,蚀刻工艺在小于或等于约20的衬底温度下进行 该方法还包括提供用于支撑衬底的衬底保持器,衬底保持器具有用于控制中心区域的第一温度的第一温度控制元件和在衬底的边缘区域处的第二温度控制元件,并且设置靶 第一和第二温度的值。

Patent Agency Ranking