公开(公告)号：US20240310428A1

公开(公告)日：2024-09-19

申请号：US18315474

申请日：2023-05-10

Applicant: Unimicron Technology Corp.

Inventor： Chun-Hsien CHIEN ,  Hsin-Hung LEE ,  Hsuan-Yu LAI ,  Yu-Chung HSIEH

IPC: G01R31/28

CPC classification number: G01R31/2805 ,  G01R31/2808

Abstract: An inspection system and an inspection method of a bare circuit board are provided. The inspection system is used for inspecting a bare circuit board. The bare circuit board includes a chip pad and an antenna. The inspection system includes an adapter board, a test device and a measure device. The adapter board includes a chip and a contact structure. The chip is electrically connected to the contact structure. The contact structure touches the chip pad so that the chip is electrically connected to the chip pad. The test device includes a transceiver antenna. The test device and the bare circuit board separate. The measure device is electrically connected to the chip or the transceiver antenna.

公开(公告)号：US20210074633A1

公开(公告)日：2021-03-11

申请号：US17100932

申请日：2020-11-22

Applicant: Unimicron Technology Corp.

Inventor： Chien-Chou CHEN ,  Chun-Hsien CHIEN ,  Wen-Liang YEH ,  Wei-Ti LIN

IPC: H01L23/522 ,  H01L23/04 ,  H01L23/00 ,  H01L21/50

Abstract: A chip packaging structure includes a circuit redistribution structure, a chip, a sealing layer, and an antenna pattern. The circuit redistribution structure includes a first and a second circuit layer, and a conductive pad. The second circuit layer is disposed on and electrically connected to the first circuit layer. The conductive pad is electrically connected to the second circuit layer. The chip is disposed on the circuit redistribution structure and electrically connected to the second circuit layer. The sealing layer having an opening and a groove covers the chip and the circuit redistribution structure. The opening exposes the conductive pad. A portion of the groove communicates with the opening. The antenna pattern includes a first and a second portion. The first portion covers sidewalls of the opening and is electrically connected to the conductive pad. The second portion is filled in the groove and electrically connected to the first portion.

公开(公告)号：US20230262900A1

公开(公告)日：2023-08-17

申请号：US18155708

申请日：2023-01-17

Applicant: Unimicron Technology Corp.

Inventor： Chun-Hsien CHIEN ,  Hsin-Hung LEE ,  Hsuan-Yu LAI ,  Yu-Chung HSIEH ,  Hung-Pin YU

IPC: H05K1/18 ,  H01Q1/48 ,  H05K1/11

CPC classification number: H05K1/181 ,  H01Q1/48 ,  H05K1/111 ,  H05K2201/10098

Abstract: A bare circuit board is provided, in which the bare circuit board includes a substrate, an antenna, a chip pad, a ground pattern and a trace. The substrate includes a surface. The antenna and the chip pad are formed on the substrate. The ground pattern is formed on the surface. The trace is formed on the surface and isn’t connected to the ground pattern. A measuring gap is formed between the trace and an edge of the ground pattern, and the trace includes a first end and a second end. The first end is electrically connected to the chip pad, whereas the second end is electrically connected to the antenna. The bare circuit board is adapted to transmit a signal. The width of the measuring gap is smaller than a quarter of an equivalent wavelength of the signal.

公开(公告)号：US20180014404A1

公开(公告)日：2018-01-11

申请号：US15273672

申请日：2016-09-22

Applicant: Unimicron Technology Corp.

Inventor： Yu-Chung HSIEH ,  Chun-Hsien CHIEN ,  Wei-Ti LIN ,  Yu-Hua CHEN

IPC: H05K1/03 ,  H05K1/02

CPC classification number: H05K1/0306 ,  H05K1/0271 ,  H05K3/0052 ,  H05K3/4605 ,  H05K3/4688 ,  H05K2201/0154 ,  H05K2201/0175 ,  H05K2201/068 ,  H05K2201/09845

Abstract: A circuit board element includes a glass substrate, a first dielectric layer, and a first patterned metal layer. The glass substrate has an edge. The first dielectric layer is disposed on the glass substrate and has a central region and an edge region. The edge region is in contact with the edge of the glass substrate, and the thickness of the central region is greater than the thickness of the edge region. The first patterned metal layer is disposed on the glass substrate and in the central region of the first dielectric layer.