SEMICONDUCTOR MEMORY STRUCTURE AND METHOD FOR FORMING THE SAME

    公开(公告)号:US20220238526A1

    公开(公告)日:2022-07-28

    申请号:US17160871

    申请日:2021-01-28

    Abstract: A semiconductor memory structure includes a semiconductor substrate including an active region and a chop region. The semiconductor memory structure also includes an isolation structure disposed in the chop region, a first gate structure extending at least through the isolation structure in the chop region, and a second gate structure extending at least through the active region. The semiconductor memory structure also includes a doped region disposed in the active region. A first distance between the doped region and the first gate structure is shorter than a second distance between the doped region and the second gate structure.

    DYNAMIC RANDOM ACCESS MEMORY AND METHOD FOR MANUFACTURING THE SAME

    公开(公告)号:US20220005703A1

    公开(公告)日:2022-01-06

    申请号:US17365203

    申请日:2021-07-01

    Abstract: A semiconductor structure and its manufacturing method are provided. The method includes sequentially forming an insulating layer and a patterned mask layer on a substrate. The patterned cover curtain layer has an opening, and the opening includes a main body portion and two extension portions located at both ends of the main body portion. The method includes sequentially forming a first sacrificial layer, a second sacrificial layer, and a third sacrificial layer on the insulating layer. The first sacrificial layer fills the extension portions and defines a recess in the main body portion. The second sacrificial layer is formed in the recess defined by the first sacrificial layer. The third sacrificial layer is formed on the first sacrificial layer located in the extension portions.

    SEMICONDUCTOR STRUCTURE
    3.
    发明公开

    公开(公告)号:US20240312791A1

    公开(公告)日:2024-09-19

    申请号:US18671641

    申请日:2024-05-22

    CPC classification number: H01L21/31144 H01L21/31116 H10B12/01

    Abstract: A semiconductor structure includes a substrate, an insulating layer formed on the substrate, and a plurality of pairs of linear structures arranged in parallel and formed in the insulating layer, wherein each pair of linear structures has a first linear structure and a second linear structure. There is a first space S1 between an end portion of the first linear structure and an end portion of the second linear structure, there is a second space S2 between a center portion of the first linear structure and a center portion of the second linear structure, and the second space S2 is greater than the first space S1.

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