公开(公告)号：US20230084548A1

公开(公告)日：2023-03-16

申请号：US17476006

申请日：2021-09-15

Applicant: Winbond Electronics Corp.

Inventor： Te-Hsuan PENG ,  Kai JEN ,  Mei-Yuan CHOU

IPC: H01L27/108

Abstract: A semiconductor structure includes a substrate and a buried gate structure in the substrate. The buried gate structure includes a gate dielectric layer formed on the sidewall and the bottom surface of a trench in the substrate, a barrier layer formed in the trench and on the sidewall and the bottom surface of the gate dielectric layer, a first work function layer formed in the trench and including a main portion and a protruding portion, a second work function layer formed at opposite sides of the protruding portion, and an insulating layer formed in the trench and on the protruding portion of the first work function layer and the second work function layer. The barrier layer surrounds the main portion of the first work function layer. The area of the top surface of the protruding portion is less than the area of the bottom surface of the protruding portion.

公开(公告)号：US20250098156A1

公开(公告)日：2025-03-20

申请号：US18966744

申请日：2024-12-03

Applicant: Winbond Electronics Corp.

Inventor： Wei-Che CHANG ,  Kai JEN ,  Yu-Po WANG

IPC: H10B12/00

Abstract: A method for forming a semiconductor structure includes the following steps. A first trench is formed in a semiconductor substrate, and a first nitride layer is formed along a sidewall and a bottom surface of the first trench. A first oxide layer is formed over the first nitride layer to fill the first trench, and the first oxide layer is recessed from the first trench to form a first recess. A portion of the first nitride layer exposed from the first recess is etched, and a second nitride layer is formed along a sidewall and a bottom surface of the first recess. The second nitride layer includes a first portion along the bottom surface and a second portion along the sidewall. The second portion is removed, and a second oxide layer is formed over the first portion to fill the first recess.

公开(公告)号：US20240186396A1

公开(公告)日：2024-06-06

申请号：US18075020

申请日：2022-12-05

Applicant: Winbond Electronics Corp.

Inventor： Shou-Chi TSAI ,  Kai JEN

IPC: H01L29/49 ,  H01L29/40

CPC classification number: H01L29/4966 ,  H01L29/401

Abstract: A semiconductor structure and a method of forming the same are provided. The semiconductor structure includes a first work function layer, a second work function layer, a protective layer, a gate stack, a first liner, a second liner, a planarization layer, and a gate plug. The first work function layer is disposed on a substrate. The second work function layer is disposed on the first work function layer. The protective layer is disposed on the second work function layer. The gate stack is disposed on the protective layer. The first liner is disposed on the gate stack. The second liner is disposed on the first liner. The planarization layer is disposed on the second liner. The gate plug is disposed on the planarization layer and in contact with the first work function layer and the second work function layer.

公开(公告)号：US20240332418A1

公开(公告)日：2024-10-03

申请号：US18448541

申请日：2023-08-11

Applicant: Winbond Electronics Corp.

Inventor： Yu-Ting CHEN ,  Kai JEN

IPC: H01L29/78 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L29/7827 ,  H01L29/41741 ,  H01L29/41775 ,  H01L29/42392 ,  H01L29/66666

Abstract: A semiconductor device includes: a substrate; a source region disposed on the substrate; a drain region disposed on the source region; and a floating main body region disposed between the source region and the drain region. The floating main body region vertically separates the source region from the drain region. The semiconductor device further includes: a gate region laterally wrapped around the floating main body region; and a gate dielectric located between the floating main body region and the gate region, and insulated the floating main body region from the gate region. A material of the gate dielectric has a negative capacitance feature.

公开(公告)号：US20220005703A1

公开(公告)日：2022-01-06

申请号：US17365203

申请日：2021-07-01

Applicant: WINBOND ELECTRONICS CORP.

Inventor： Kai JEN ,  Hsiang-Po LIU

IPC: H01L21/311 ,  H01L27/108

Abstract: A semiconductor structure and its manufacturing method are provided. The method includes sequentially forming an insulating layer and a patterned mask layer on a substrate. The patterned cover curtain layer has an opening, and the opening includes a main body portion and two extension portions located at both ends of the main body portion. The method includes sequentially forming a first sacrificial layer, a second sacrificial layer, and a third sacrificial layer on the insulating layer. The first sacrificial layer fills the extension portions and defines a recess in the main body portion. The second sacrificial layer is formed in the recess defined by the first sacrificial layer. The third sacrificial layer is formed on the first sacrificial layer located in the extension portions.

公开(公告)号：US20230255020A1

公开(公告)日：2023-08-10

申请号：US18301572

申请日：2023-04-17

Applicant: Winbond Electronics Corp.

Inventor： Te-Hsuan PENG ,  Kai JEN ,  Mei-Yuan CHOU

IPC: H10B12/00

CPC classification number: H10B12/34 ,  H10B12/053

Abstract: A semiconductor structure includes a substrate and a buried gate structure in the substrate. The buried gate structure includes a gate dielectric layer formed on the sidewall and the bottom surface of a trench in the substrate, a barrier layer formed in the trench and on the sidewall and the bottom surface of the gate dielectric layer, a first work function layer formed in the trench and including a main portion and a protruding portion, a second work function layer formed at opposite sides of the protruding portion, and an insulating layer formed in the trench and on the protruding portion of the first work function layer and the second work function layer. The barrier layer surrounds the main portion of the first work function layer. The area of the top surface of the protruding portion is less than the area of the bottom surface of the protruding portion.

公开(公告)号：US20210257491A1

公开(公告)日：2021-08-19

申请号：US17132293

申请日：2020-12-23

Applicant: Winbond Electronics Corp.

Inventor： Hung-Yu WEI ,  Pei-Hsiu PENG ,  Kai JEN

IPC: H01L29/78 ,  H01L29/66

Abstract: A multi-gate semiconductor structure and its manufacturing method are provided. The semiconductor structure includes a substrate having an active area and an isolation structure adjacent to the active area. The semiconductor structure includes a gate structure formed on the substrate and a gate dielectric layer between the gate structure and the substrate. The gate structure includes a first part above the top surface of the substrate and a second part connected to the first part. The second part of the gate structure is formed in the isolation structure, wherein the isolation structure is in direct contact with the bottom surface and sidewalls of the second part of the gate structure. A method of manufacturing the semiconductor structure includes partially etching the isolation structure to form a trench exposing the top portion of sidewalls of the substrate. The gate dielectric layer and the gate structure extend into the trench.

公开(公告)号：US20210013104A1

公开(公告)日：2021-01-14

申请号：US16508875

申请日：2019-07-11

Applicant: Winbond Electronics Corp.

Inventor： Kai JEN ,  Li-Ting WANG ,  Yi-Hao CHIEN

IPC: H01L21/8234 ,  H01L21/768 ,  H01L27/108

Abstract: A semiconductor structure includes a semiconductor substrate, a gate stack disposed over the semiconductor substrate, a first oxide spacer disposed along a sidewall of the gate stack, a protection portion disposed over the first oxide spacer, and an interlayer dielectric layer disposed over the semiconductor substrate. The first oxide spacer and the protection portion are disposed between the gate stack and the interlayer dielectric layer.

公开(公告)号：US20200185495A1

公开(公告)日：2020-06-11

申请号：US16216089

申请日：2018-12-11

Applicant: Winbond Electronics Corp.

Inventor： Chien-Hsu TSENG ,  Chia-Lan HSU ,  Kai JEN ,  Yi-Hao CHIEN

IPC: H01L29/06 ,  H01L21/768 ,  H01L21/764

Abstract: A semiconductor device is provided, including a substrate; a dielectric structure over the substrate; and a capping layer over the dielectric structure. The bottom of the capping layer has an M-shaped cross section. The capping layer and the dielectric structure are formed of different materials.

公开(公告)号：US20240312791A1

公开(公告)日：2024-09-19

申请号：US18671641

申请日：2024-05-22

Applicant: Winbond Electronics Corp.

Inventor： Kai JEN ,  Hsiang-Po LIU

IPC: H01L21/311 ,  H10B12/00

CPC classification number: H01L21/31144 ,  H01L21/31116 ,  H10B12/01

Abstract: A semiconductor structure includes a substrate, an insulating layer formed on the substrate, and a plurality of pairs of linear structures arranged in parallel and formed in the insulating layer, wherein each pair of linear structures has a first linear structure and a second linear structure. There is a first space S1 between an end portion of the first linear structure and an end portion of the second linear structure, there is a second space S2 between a center portion of the first linear structure and a center portion of the second linear structure, and the second space S2 is greater than the first space S1.