公开(公告)号：US20220068930A1

公开(公告)日：2022-03-03

申请号：US17388033

申请日：2021-07-29

Applicant: Winbond Electronics Corp.

Inventor： Te-Hsuan Peng ,  Kai Jen

IPC: H01L27/108 ,  H01L49/02 ,  H01L21/768 ,  H01L21/311

Abstract: A semiconductor device including a substrate, a capacitor, a stop layer, a first contact, and a second contact is provided. The substrate includes a memory array region and a peripheral circuit region. The capacitor is located in the memory array region. The capacitor includes a first electrode, a second electrode, and an insulating layer. The second electrode is located on the first electrode. The insulating layer is located between the first electrode and the second electrode. The stop layer is located on the second electrode in the memory array region and extends into the peripheral circuit region. A material of the stop layer is not a conductive material. The first contact is located in the memory array region, passes through the stop layer, and is electrically connected to the second electrode. The second contact is located in the peripheral circuit region and passes through the stop layer.

公开(公告)号：US20240334685A1

公开(公告)日：2024-10-03

申请号：US18327842

申请日：2023-06-01

Applicant: Winbond Electronics Corp.

Inventor： Te-Hsuan Peng ,  Keng-Ping Lin

IPC: H10B12/00

CPC classification number: H10B12/488 ,  H10B12/02 ,  H10B12/482 ,  H10B12/485

Abstract: Provided are a dynamic random access memory and a method for manufacturing the same. The DRAM includes: a plurality of word line structures, located in a substrate; a plurality of bit line structures, located above the substrate, crossing over the plurality of word line structures; a plurality of node contacts, each of which being located between adjacent two of the word line structures and adjacent two of the bit line structures; and a plurality of first spacers, separating the plurality of node contacts. Each of the plurality of first spacers further comprises: spacer material, filled in a gap between the node contacts that are adjacent; and a first cap layer, embedded in the spacer material.

公开(公告)号：US20240292595A1

公开(公告)日：2024-08-29

申请号：US18655341

申请日：2024-05-06

Applicant: Winbond Electronics Corp.

Inventor： Te-Hsuan Peng ,  Kai Jen

IPC: H10B12/00 ,  H01L21/311 ,  H01L21/768

CPC classification number: H10B12/31 ,  H01L21/31144 ,  H01L21/76802 ,  H01L21/76877 ,  H01L28/75 ,  H10B12/033

Abstract: A semiconductor device including a substrate, a capacitor, a stop layer, a first contact, and a second contact is provided. The substrate includes a memory array region and a peripheral circuit region. The capacitor is located in the memory array region. The capacitor includes a first electrode, a second electrode, and an insulating layer. The second electrode is located on the first electrode. The insulating layer is located between the first electrode and the second electrode. The stop layer is located on the second electrode in the memory array region and extends into the peripheral circuit region. A material of the stop layer is not a conductive material. The first contact is located in the memory array region, passes through the stop layer, and is electrically connected to the second electrode. The second contact is located in the peripheral circuit region and passes through the stop layer.

公开(公告)号：US12016173B2

公开(公告)日：2024-06-18

申请号：US17388033

申请日：2021-07-29

Applicant: Winbond Electronics Corp.

Inventor： Te-Hsuan Peng ,  Kai Jen

IPC: H10B12/00 ,  H01L21/311 ,  H01L21/768 ,  H01L49/02

CPC classification number: H10B12/31 ,  H01L21/31144 ,  H01L21/76802 ,  H01L21/76877 ,  H01L28/75 ,  H10B12/033

Abstract: A semiconductor device including a substrate, a capacitor, a stop layer, a first contact, and a second contact is provided. The substrate includes a memory array region and a peripheral circuit region. The capacitor is located in the memory array region. The capacitor includes a first electrode, a second electrode, and an insulating layer. The second electrode is located on the first electrode. The insulating layer is located between the first electrode and the second electrode. The stop layer is located on the second electrode in the memory array region and extends into the peripheral circuit region. A material of the stop layer is not a conductive material. The first contact is located in the memory array region, passes through the stop layer, and is electrically connected to the second electrode. The second contact is located in the peripheral circuit region and passes through the stop layer.

公开(公告)号：US11943913B2

公开(公告)日：2024-03-26

申请号：US18301572

申请日：2023-04-17

Applicant: Winbond Electronics Corp.

Inventor： Te-Hsuan Peng ,  Kai Jen ,  Mei-Yuan Chou

IPC: H10B12/00

CPC classification number: H10B12/34 ,  H10B12/053

Abstract: A semiconductor structure includes a substrate and a buried gate structure in the substrate. The buried gate structure includes a gate dielectric layer formed on the sidewall and the bottom surface of a trench in the substrate, a barrier layer formed in the trench and on the sidewall and the bottom surface of the gate dielectric layer, a first work function layer formed in the trench and including a main portion and a protruding portion, a second work function layer formed at opposite sides of the protruding portion, and an insulating layer formed in the trench and on the protruding portion of the first work function layer and the second work function layer. The barrier layer surrounds the main portion of the first work function layer. The area of the top surface of the protruding portion is less than the area of the bottom surface of the protruding portion.