Abstract:
According to one embodiment, a flexible flat cable includes a plurality of ground lines and a plurality of signal lines. Each of the ground lines is connected to an electromagnetic shield layer by two connection line members. An arrangement of the ground lines and signal lines that are positioned in a region on one side of a center line of the flexible flat cable and an arrangement of the ground lines and signal lines on a region on the other side are symmetric with respect to the center line. In each of two connectors to which end portions of the flexible flat cable are coupled, terminals corresponding to the ground lines are grounded, a terminal corresponding to a signal line interposed between two ground lines is assigned a high-speed signal, and a terminal corresponding to another signal line is assigned a ground potential.
Abstract:
A plain layer in a forming area of a measuring wiring pattern is patterned so that its copper-containing amount may be coincided with a copper-containing amount in a forming area of a measurement target signal wiring pattern. Thereby, it is possible to coincide a thickness of an insulating layer in the forming area of the measuring wiring pattern with a thickness of the insulating layer in the forming area of the measurement target signal wiring pattern, thus reducing a measuring error of the characteristic impedance based on a difference of a thickness of the insulating layer. Using the measuring wiring pattern, it is possible to measure a correct characteristic impedance of the measurement target signal wiring pattern.
Abstract:
The present invention is directed to a novel process for the preparation of compounds having inhibitory activity against sodium-dependent glucose transporter (SGLT) being present in the intestine or kidney.
Abstract:
According to one embodiment, a display apparatus includes a display panel, a light emitting element arranged as a light source for the display panel, a board on which a first circuit for controlling power supply to the light emitting element is arranged, and a second circuit which is arranged on the board, and executes a process unrelated to a drive process of the display panel.
Abstract:
A pyridopyrimidine or a naphthyridine derivative of the formula (I): wherein R1 is an optionally substituted nitrogen-containing heterocyclic group, etc.; R2 is H or a lower alkyl group; R3 is H or an optionally substituted lower alkyl group, etc.; R4 is H, a lower alkyl group, COOH, etc.; R5 is a lower alkyl group which may optionally be substituted by an optionally substituted aryl etc.; one of X and Y is CH and the other is nitrogen, or both of X and Y are nitrogen; or a pharmaceutically acceptable salt thereof, these compounds exhibiting excellent PDE V inhibitory activities, and being useful in the prophylaxis or treatment of penile erectile dysfunction, etc.
Abstract translation:式(I)的吡啶并嘧啶或二氮杂萘衍生物:其中R 1是任选取代的含氮杂环基等; R 2是H或低级烷基; R 3是H或任选取代的低级烷基等; R 4是H,低级烷基,COOH等; R 5是可任意被任选取代的芳基等取代的低级烷基; X和Y之一是CH,另一个是氮,X和Y都是氮; 或其药学上可接受的盐,这些化合物表现出优异的PDE V抑制活性,并且可用于预防或治疗阴茎勃起功能障碍等。
Abstract:
A pyridopyrimidine or a naphthyridine derivative of the formula (I): wherein R1 is an optionally substituted nitrogen-containing heterocyclic group, etc.; R2 is H or a lower alkyl group; R3 is H or an optionally substituted lower alkyl group, etc.; R4 is H, a lower alkyl group, COOH, etc.; R5 is a lower alkyl group which may optionally be substituted by an optionally substituted aryl etc.; one of X and Y is CH and the other is nitrogen, or both of X and Y are nitrogen; or a pharmaceutically acceptable salt thereof, these compounds exhibiting excellent PDE V inhibitory activities, and being useful in the prophylaxis or treatment of penile erectile dysfunction, etc.
Abstract translation:式(I)的吡啶并嘧啶或二氮杂萘衍生物:其中R 1是任选取代的含氮杂环基等; R 2是H或低级烷基; R 3是H或任选取代的低级烷基等; R 4是H,低级烷基,COOH等; R 5是可任意被任选取代的芳基等取代的低级烷基; X和Y之一是CH,另一个是氮,X和Y都是氮; 或其药学上可接受的盐,这些化合物表现出优异的PDE V抑制活性,并且可用于预防或治疗阴茎勃起功能障碍等。
Abstract:
According to at least one embodiment, an electronic apparatus, such as a television, includes a housing, battery cells in the housing, and a supporting portion between the battery cells. The supporting portion is thicker than one of the battery cells. The electronic apparatus can also include case including a base and a cover.
Abstract:
A flexible flat cable includes a plurality of ground lines and a plurality of signal lines. Each of the ground lines is connected to an electromagnetic shield layer by two connection line members. An arrangement of the ground lines and signal lines that are positioned in a region on one side of a center line of the flexible flat cable and an arrangement of the ground lines and signal lines on a region on the other side are symmetric with respect to the center line. In each of two connectors to which end portions of the flexible flat cable are coupled, terminals corresponding to the ground lines are grounded, a terminal corresponding to a signal line interposed between two ground lines is assigned a high-speed signal, and a terminal corresponding to another signal line is assigned a ground potential.
Abstract:
According to one embodiment, a printed wiring board includes, a main body including an obverse side with an obverse wiring layer, and a reverse side with a reverse wiring layer first pads provided on the obverse side in a first region defined thereon, and to be connected to terminals arranged on a surface of a first semiconductor chip, second pads provided on the reverse side in a second region defined thereon and overlapping with the first region, and to be connected to terminals arranged on a surface of a second semiconductor chip, and interlayer wiring electrically connecting those of the first pads, which are located in an overlapping region, to those of the second pads which are located in the overlapping region.
Abstract:
According to one embodiment, a printed wiring board includes, a main body including an obverse side with an obverse wiring layer, and a reverse side with a reverse wiring layer first pads provided on the obverse side in a first region defined thereon, and to be connected to terminals arranged on a surface of a first semiconductor chip, second pads provided on the reverse side in a second region defined thereon and overlapping with the first region, and to be connected to terminals arranged on a surface of a second semiconductor chip, and interlayer wiring electrically connecting those of the first pads, which are located in an overlapping region, to those of the second pads which are located in the overlapping region.