公开(公告)号：WO2005119765A2

公开(公告)日：2005-12-15

申请号：PCT/US2005/019319

申请日：2005-06-02

Applicant: TESSERA, INC. ,  GREEN, Ronald ,  KRISHNAN, Sridhar ,  WILSON, Stuart, E. ,  SHOOK, James, Gill ,  TSAI, Ming ,  STAVROS, Andy

Inventor： GREEN, Ronald ,  KRISHNAN, Sridhar ,  WILSON, Stuart, E. ,  SHOOK, James, Gill ,  TSAI, Ming ,  STAVROS, Andy

IPC: H01L23/00

CPC classification number: H05K3/368 ,  H05K1/145 ,  H05K3/0052 ,  H05K3/3442 ,  H05K3/366 ,  H05K3/403 ,  H05K3/4092 ,  H05K2201/0397 ,  H05K2201/048 ,  H05K2201/0715 ,  H05K2201/09036 ,  H05K2201/09181 ,  H05K2201/09845 ,  H05K2201/0999 ,  H05K2201/10484

Abstract: An assembly is provided which includes a first circuit panel having a top surface, a first dielectric element and first conductive traces disposed on the first dielectric element. In addition, a second circuit panel has a bottom surface, a second dielectric element and second conductive traces disposed on the second dielectric element, where at least a portion of the second circuit panel overlies at least a portion of the first circuit panel. The assembly further includes an interconnect circuit panel having a third dielectric element which has a front surface, a rear surface opposite the front surface, a top end extending between the front and rear surfaces, a bottom end extending between the front and rear surfaces, and a plurality of interconnect traces disposed on the dielectric element. The bottom end of the interconnect element abuts the top surface of the first circuit panel and the top end abuts the bottom surface of the second circuit panel, where at least some of the first conductive traces are in conductive communication with the second conductive traces through the interconnect traces.

Abstract translation: 提供了一种组件，其包括具有顶表面的第一电路板，设置在第一介电元件上的第一介电元件和第一导电迹线。 此外，第二电路板具有底表面，第二电介质元件和设置在第二电介质元件上的第二导电迹线，其中第二电路板的至少一部分覆盖在第一电路板的至少一部分上。 该组件还包括具有第三电介质元件的互连电路板，第三电介质元件具有前表面，与前表面相对的后表面，在前表面和后表面之间延伸的顶端，在前表面和后表面之间延伸的底端，以及 布置在电介质元件上的多个互连迹线。 互连元件的底端邻接第一电路板的顶表面，并且顶端邻接第二电路板的底表面，其中至少一些第一导电迹线通过第二导电迹线与第二导电迹线导通连通 互连线。

公开(公告)号：WO2006009772A3

公开(公告)日：2007-01-18

申请号：PCT/US2005021293

申请日：2005-06-16

Applicant: TESSERA INC ,  GIBSON DAVID ,  STAVROS ANDY ,  WARNER MICHAEL

Inventor： GIBSON DAVID ,  STAVROS ANDY ,  WARNER MICHAEL

IPC: H01R11/16 ,  H01L23/02 ,  H01L23/50 ,  H01L23/64

CPC classification number: H01L23/66 ,  H01L23/50 ,  H01L23/642 ,  H01L25/105 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/3011 ,  H01L2924/00

Abstract: A decoupling device (10) includes a plurality of capacitors having different capacitances (14, 16, 18) physically mounted in a package (12, 212), and terminals including at least one first terminal (24, 224) and at least one second terminal (26, 226) adapted for mounting the package to a circuit panel. The plural capacitors are connected in parallel between the first and second terminals so as to form plural circuits with different self-resonant frequencies. The device can be mounted as a unit on a circuit board with the first terminals connected to a power conductor and the second terminals connected to a ground conductor, and provides low impedance shunting of noise over a wide frequency spectrum.

Abstract translation: 解耦装置（10）包括物理地安装在封装（12,212）中的具有不同电容（14,16,18）的多个电容器，以及包括至少一个第一端子（24,224）和至少一个第二端子 端子（26,226），适于将封装安装到电路板。 多个电容器并联连接在第一和第二端子之间，以形成具有不同自谐振频率的多个电路。 该装置可以作为单元安装在电路板上，其中第一端子连接到电源导体，并且第二端子连接到接地导体，并且在宽频谱上提供低阻抗的噪声分流。

公开(公告)号：WO2005119765A3

公开(公告)日：2006-03-09

申请号：PCT/US2005019319

申请日：2005-06-02

Applicant: TESSERA INC ,  GREEN RONALD ,  KRISHNAN SRIDHAR ,  WILSON STUART E ,  SHOOK JAMES GILL ,  TSAI MING ,  STAVROS ANDY

Inventor： GREEN RONALD ,  KRISHNAN SRIDHAR ,  WILSON STUART E ,  SHOOK JAMES GILL ,  TSAI MING ,  STAVROS ANDY

IPC: H05K3/36 ,  H01L23/34 ,  H05K1/14 ,  H05K3/00 ,  H05K3/34 ,  H05K3/40

CPC classification number: H05K3/368 ,  H05K1/145 ,  H05K3/0052 ,  H05K3/3442 ,  H05K3/366 ,  H05K3/403 ,  H05K3/4092 ,  H05K2201/0397 ,  H05K2201/048 ,  H05K2201/0715 ,  H05K2201/09036 ,  H05K2201/09181 ,  H05K2201/09845 ,  H05K2201/0999 ,  H05K2201/10484

Abstract: An assembly is provided which includes a first circuit panel having a top surface, a first dielectric element and first conductive traces disposed on the first dielectric element. In addition, a second circuit panel has a bottom surface, a second dielectric element and second conductive traces disposed on the second dielectric element, where at least a portion of the second circuit panel overlies at least a portion of the first circuit panel. The assembly further includes an interconnect circuit panel having a third dielectric element which has a front surface, a rear surface opposite the front surface, a top end extending between the front and rear surfaces, a bottom end extending between the front and rear surfaces, and a plurality of interconnect traces disposed on the dielectric element. The bottom end of the interconnect element abuts the top surface of the first circuit panel and the top end abuts the bottom surface of the second circuit panel, where at least some of the first conductive traces are in conductive communication with the second conductive traces through the interconnect traces.

Abstract translation: 提供了一种组件，其包括具有顶表面的第一电路板，设置在第一介电元件上的第一介电元件和第一导电迹线。 此外，第二电路板具有底表面，第二电介质元件和设置在第二电介质元件上的第二导电迹线，其中第二电路板的至少一部分覆盖在第一电路板的至少一部分上。 该组件还包括具有第三电介质元件的互连电路板，第三电介质元件具有前表面，与前表面相对的后表面，在前表面和后表面之间延伸的顶端，在前表面和后表面之间延伸的底端，以及 布置在电介质元件上的多个互连迹线。 互连元件的底端邻接第一电路板的顶表面，并且顶端邻接第二电路板的底表面，其中至少一些第一导电迹线通过第二导电迹线与第二导电迹线导通连通 互连线。

公开(公告)号：WO2006009772A2

公开(公告)日：2006-01-26

申请号：PCT/US2005/021293

申请日：2005-06-16

Applicant: TESSERA, INC. ,  GIBSON, David ,  STAVROS, Andy ,  WARNER, Michael

Inventor： GIBSON, David ,  STAVROS, Andy ,  WARNER, Michael

IPC: H01L23/02

CPC classification number: H01L23/66 ,  H01L23/50 ,  H01L23/642 ,  H01L25/105 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/3011 ,  H01L2924/00

Abstract: A decoupling device (10) includes a plurality of capacitors having different capacitances (14, 16, 18) physically mounted in a package (12, 212), and terminals including at least one first terminal (24, 224) and at least one second terminal (26, 226) adapted for mounting the package to a circuit panel. The plural capacitors are connected in parallel between the first and second terminals so as to form plural circuits with different self-resonant frequencies. The device can be mounted as a unit on a circuit board with the first terminals connected to a power conductor and the second terminals connected to a ground conductor, and provides low impedance shunting of noise over a wide frequency spectrum.

Abstract translation: 解耦装置（10）包括物理地安装在封装（12,212）中的具有不同电容（14,16,18）的多个电容器，以及包括至少一个第一端子（24,224）和至少一个第二端子 端子（26,226），适于将封装安装到电路板。 多个电容器并联连接在第一和第二端子之间，以形成具有不同自谐振频率的多个电路。 该装置可以作为单元安装在电路板上，其中第一端子连接到电源导体，并且第二端子连接到接地导体，并且在宽频谱上提供低阻抗的噪声分流。