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    METHODS AND SYSTEMS FOR CMOS-BASED RADIO-FREQUENCY FILTERS OF MEMS HAVING ORGANIZED SETS OF ELEMENTS
    1.
    发明申请
    METHODS AND SYSTEMS FOR CMOS-BASED RADIO-FREQUENCY FILTERS OF MEMS HAVING ORGANIZED SETS OF ELEMENTS 审中-公开
    具有有组织元素的MEMS的基于CMOS的无线电频率滤波器的方法和系统

    公开(公告)号：WO2013068633A2

    公开(公告)日：2013-05-16

    申请号：PCT/ES2012070788

    申请日：2012-11-12

    Applicant: BAOLAB MICROSYSTEMS SL

    Inventor： MONTANYA SILVESTRE JOSEP ,  LLAMAS MOROTE MARC ANTONIO

    IPC: B81C1/00 ,  H03H3/007

    CPC classification number: B81C1/00246 ,  B81B2201/0271 ,  B81C2203/0714 ,  B81C2203/0742 ,  B81C2203/0771 ,  H03H3/0073 ,  H03H9/2463 ,  H03H2009/02299

    Abstract: The invention provides systems and methods for producing a chip comprising a radio-frequency filter which is based on MEMS and is arranged inside an integrated circuit. In one aspect, the systems and methods provide a chip which includes electronic elements formed on a substrate made of semiconductor material. The chip additionally includes an interconnection layer stack which includes layers of conductive material which are separated by layers of dielectric material. A radio-frequency filter is formed inside the interconnection layer stack by applying gaseous HF to the interconnection layers. The radio-frequency filter includes a plurality of resonator elements which are mechanically decoupled.

    Abstract translation: 本发明提供了一种用于制造芯片的系统和方法，该芯片包括基于MEMS并布置在集成电路内的射频滤波器。 一方面，该系统和方法提供一种芯片，其包括形成在由半导体材料制成的基板上的电子元件。 芯片还包括互连层堆叠，其包括由电介质材料层隔开的导电材料层。 通过向互连层施加气态HF，在互连层堆叠内部形成射频滤波器。 射频滤波器包括机械解耦的多个谐振元件。

    METHODS AND SYSTEMS FOR FABRICATION OF MEMS CMOS DEVICES
    3.
    发明专利
    METHODS AND SYSTEMS FOR FABRICATION OF MEMS CMOS DEVICES 未知

    公开(公告)号：SG176093A1

    公开(公告)日：2011-12-29

    申请号：SG2011084241

    申请日：2010-05-20

    Applicant: BAOLAB MICROSYSTEMS SL

    Inventor： TAYYIB SABIR ,  LLAMAS MOROTE MARC ANTONIO ,  VALLE FRAGA JUAN JOSE ,  MONTANYA I SILVESTRE JOSEP

    Abstract: A MEMS integrated circuit including a plurality of layers where a portion includes one or more electronic elements on a semiconductor material substrate. The circuit includes a structure of interconnection layers having a bottom layer of conductor material and a top layer of conductor material where the layers are separated by at least one layer of dielectric material. The bottom layer may be formed above and in contact with an Inter Dielectric Layer. The circuit also includes a hollow space within the structure of interconnection layers and a MEMS device in communication with the structure of interconnection layers.

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