FIELD EMITTER DEVICE, AND VEIL PROCESS FOR THE FABRICATION THEREOF
    1.
    发明申请
    FIELD EMITTER DEVICE, AND VEIL PROCESS FOR THE FABRICATION THEREOF 审中-公开
    场发射器件及其制造方法

    公开(公告)号:WO9709731A3

    公开(公告)日:1997-04-03

    申请号:PCT/US9613330

    申请日:1996-08-19

    Applicant: FED CORP

    Abstract: A field emitter device formed by a veil process wherein a protective layer including a release layer is deposited on a gate electrode layer (62) for the device, the protective layer overlaying the circumscribing peripheral edge of the opening of the gate electrode layer (62) to protect the edge of the gate electrode layer (62) during etching of a field emitter cavity (72) in a dielectric material layer (30) on a substrate (12) and during the formation of a field emitter element (40) in the cavity by depositing a field emitter material through the opening (72). The protective layer is readily removed subsequent to completion of the cavity etching formation steps, to yield the field emitter device. The field emission device further includes a current limiter composition (14) for permitting high frequency emission of electrons from the field emitter element (40) at low turn-on voltage.

    PEDESTAL EDGE EMITTER AND NON-LINEAR CURRENT LIMITERS FOR FIELD EMITTER DISPLAYS AND OTHER ELECTRON SOURCE APPLICATIONS
    2.
    发明申请
    PEDESTAL EDGE EMITTER AND NON-LINEAR CURRENT LIMITERS FOR FIELD EMITTER DISPLAYS AND OTHER ELECTRON SOURCE APPLICATIONS 审中-公开
    用于场发射显示器和其他电子源应用的PEDESTAL边缘发射极和非线性电流限制

    公开(公告)号:WO9709730A3

    公开(公告)日:1997-06-05

    申请号:PCT/US9613329

    申请日:1996-08-19

    Applicant: FED CORP

    CPC classification number: H01J1/3042 H01J2201/30423 H01J2201/319

    Abstract: A microelectronic field emitter device (50) comprising a substrate (78), a conductive pedestal (64) on said substrate, and an edge emitter electrode on said pedestal, wherein the edge emitter electrode comprises an emitter cap layer (66) having an edge (68). The invention also contemplates a current limiter for a microelectronic field emitter device, which comprises a semi-insulating material selected from the group consisting of SiO, SiO+Cr (0 to 50 wt.%), SiO2 + Cr (0 to 50 wt.%), SiO + Nb, Al2O3 and SixOyNz sandwiched between an electron injector and a hole injector. Another aspect of the invention relates to a microelectronic field emitter device comprising a substrate (240), an emitter conductor (242) on such substrate, and a current limiter stack (244) formed on said substrate, such stack having a top (246) and at least one edge (248, 250), a resistive strap (266) on top of the stack, extending over the edge in electrical contact with the emitter conductor; and an emitter electrode on the current limiter stack over the resistive strap.

    FLASHOVER CONTROLLING SPACER FOR PARALLEL PLATE ELECTRON BEAM DEVICE
    3.
    发明申请
    FLASHOVER CONTROLLING SPACER FOR PARALLEL PLATE ELECTRON BEAM DEVICE 审中-公开
    平行电子束装置的闪光控制间隔器

    公开(公告)号:WO9903126A8

    公开(公告)日:1999-04-15

    申请号:PCT/US9813802

    申请日:1998-07-02

    Applicant: FED CORP

    CPC classification number: H01J9/261 H01J29/862 H01J31/123 H01J2201/304

    Abstract: A structure to reduce the likelihood of flashover in a parallel plate electron beam array is disclosed. The structure may comprise a means for generating a low intensity electric field in the vicinity of a spacer (200) separating the parallel plate of the array (100), and the anode (300). The presence of the electric field in the vicinity of the spacer is not conductive to the occurrence of a surface supported flashover on the gates and emitters. The electric field means may be provided by a conductive coating (240) on one or more surfaces of the spacer. Alternatively, the electric field means may be provided by a conductive coating on a guard ring located within the array in the vicinity of the spacer. Methods of making the structure are also disclosed.

    Abstract translation: 公开了一种降低平行板电子束阵列中闪络的可能性的结构。 该结构可以包括用于在分隔阵列(100)的平行板和阳极(300)的间隔物(200)附近产生低强度电场的装置。 间隔物附近的电场的存在对于在栅极和发射极上发生表面支撑的闪络不是导电的。 电场装置可以由间隔物的一个或多个表面上的导电涂层(240)提供。 或者,电场装置可以通过位于阵列附近的保护环上的导电涂层来提供。 还公开了制造该结构的方法。

    A FIELD EMITTER DEVICE WITH A CURRENT LIMITER STRUCTURE
    4.
    发明申请
    A FIELD EMITTER DEVICE WITH A CURRENT LIMITER STRUCTURE 审中-公开
    具有电流限制结构的场发射器件

    公开(公告)号:WO9831044A3

    公开(公告)日:1998-10-29

    申请号:PCT/US9800149

    申请日:1998-01-13

    Applicant: FED CORP

    CPC classification number: H01J1/3042 H01J2201/319 H01J2329/00

    Abstract: A field emitter device includes a column conductor (22), an insulator (23), and a resistor structure (32) for advantageously limiting current in a field emitter array. A wide column conductor (22) is deposited on an insulating substrate (21). An insulator (47) is laid over the column conductor (22). A high resistance layer (32) is placed on the insulator (23) and is physically isolated from the column conductor (22). The high resistance material may be chromium oxide or 10-50 wt.% Cr+SiO. A group of microtip electron emitters (30) is placed over the high resistance layer (32) to connect in an electrical series circuit the colum conductor (22), the high resistance layer (32), and the group of electron emitters (30). One or more layers of insulator (23) and a gate electrode (24), all with cavities for the electron emitters, are laid over the high resistance material (32). One layer of insulator is selected from a group of materials including SiC, SiO, and Si3N4. An anode plate (60) is attached with intermediate space (70) between the anode plate (60) and the microtip electron emitters (30) being evacuated.

    SEALING STRUCTURE FOR ORGANIC LIGHT EMITTING DEVICES

    公开(公告)号:CA2295676A1

    公开(公告)日:1999-01-21

    申请号:CA2295676

    申请日:1998-07-09

    Applicant: FED CORP

    Abstract: A sealing structure (190) for an organic light emitting device display (100). The sealing structure (190) comprises a metal film (175) overlying a dielectric film (150). The sealing structure (190) has low moisture and oxygen permeability. At least one of the metal layers (175) may react with moisture or oxygen to seal off pin holes. A net low stress sealing structure (190) may be formed by combining tensile and compressive films. The sealing structure (190) may be etched to create openings (160) for connection to outside circuitry. The innovative sealing structure (190) minimizes moisture leakage and vertical shorts between diode cathode (900) and anode (400).

    FLAT DISPLAY SPACER STRUCTURE AND MANUFACTURING METHOD

    公开(公告)号:CA2196040A1

    公开(公告)日:1996-02-08

    申请号:CA2196040

    申请日:1995-07-25

    Applicant: FED CORP

    Abstract: A spacer structure (10) for use in a flat panel display (100), and a corresponding flat panel display article (100) are disclosed, together with an appertaining method of fabricating the spacer structure utilizing a photosensitive precursor material which is selectively irradiated, developed and etchingly processed to produce shaped standoff elements for a unitary spacer structure. The spacer structure may be dimensionally fabricated to precisely align with a selected pixel region, comprising a single pixel or an array of pixels, e.g., a color (red, blue, green) triad.

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