公开(公告)号：WO9709730A3

公开(公告)日：1997-06-05

申请号：PCT/US9613329

申请日：1996-08-19

Applicant: FED CORP

Inventor： JONES GARY W ,  ZIMMERMAN STEVEN M ,  JONES SUSAN K SCHWARTZ ,  COSTA MICHAEL J ,  SILVERNAIL JEFFREY A

IPC: H01J1/304 ,  H01J

CPC classification number: H01J1/3042 ,  H01J2201/30423 ,  H01J2201/319

Abstract: A microelectronic field emitter device (50) comprising a substrate (78), a conductive pedestal (64) on said substrate, and an edge emitter electrode on said pedestal, wherein the edge emitter electrode comprises an emitter cap layer (66) having an edge (68). The invention also contemplates a current limiter for a microelectronic field emitter device, which comprises a semi-insulating material selected from the group consisting of SiO, SiO+Cr (0 to 50 wt.%), SiO2 + Cr (0 to 50 wt.%), SiO + Nb, Al2O3 and SixOyNz sandwiched between an electron injector and a hole injector. Another aspect of the invention relates to a microelectronic field emitter device comprising a substrate (240), an emitter conductor (242) on such substrate, and a current limiter stack (244) formed on said substrate, such stack having a top (246) and at least one edge (248, 250), a resistive strap (266) on top of the stack, extending over the edge in electrical contact with the emitter conductor; and an emitter electrode on the current limiter stack over the resistive strap.

公开(公告)号：WO9831044A3

公开(公告)日：1998-10-29

申请号：PCT/US9800149

申请日：1998-01-13

Applicant: FED CORP

Inventor： JONES GARY W ,  JONES SUSAN K S ,  MARINO JEFFREY ,  HO JOSEPH K ,  BOYSEL ROBERT MARK ,  ZIMMERMAN STEVEN M ,  LIU YACHIN ,  COSTA MICHAEL J ,  SILVERNAIL JEFFREY A

IPC: H01J1/304 ,  H01L

CPC classification number: H01J1/3042 ,  H01J2201/319 ,  H01J2329/00

Abstract: A field emitter device includes a column conductor (22), an insulator (23), and a resistor structure (32) for advantageously limiting current in a field emitter array. A wide column conductor (22) is deposited on an insulating substrate (21). An insulator (47) is laid over the column conductor (22). A high resistance layer (32) is placed on the insulator (23) and is physically isolated from the column conductor (22). The high resistance material may be chromium oxide or 10-50 wt.% Cr+SiO. A group of microtip electron emitters (30) is placed over the high resistance layer (32) to connect in an electrical series circuit the colum conductor (22), the high resistance layer (32), and the group of electron emitters (30). One or more layers of insulator (23) and a gate electrode (24), all with cavities for the electron emitters, are laid over the high resistance material (32). One layer of insulator is selected from a group of materials including SiC, SiO, and Si3N4. An anode plate (60) is attached with intermediate space (70) between the anode plate (60) and the microtip electron emitters (30) being evacuated.