公开(公告)号：JP2012129997A

公开(公告)日：2012-07-05

申请号：JP2011265779

申请日：2011-12-05

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： FABRICE JEAN VERPLANKEN ,  ABEL FRANCOIS ,  BASSO CLAUDE ,  JEAN L CALVIGNAC ,  NATARAJAN VAIDHYANATHAN ,  COLIN B VERRILLI

IPC: H04L12/801 ,  H04L12/851 ,  H04L12/911

CPC classification number: H04L47/2441 ,  H04L69/22

Abstract: PROBLEM TO BE SOLVED: To provide a method, an apparatus, and a computer program for adding a QOS level to a packet.SOLUTION: Syntax analysis of a multi layer network communication including a nest header by a continuous network layer is performed, and a value related to a priority or a quality of service requirement (a priority indicator value) for data of each individual layer distributed over a header group is extracted. Aggregated data (a composition aggregation priority value) is applied to a table where different possible composition aggregation priority values corresponding to a lower resolution quality level value are mapped. The priority indicator value or the composition aggregation priority value can be filtered, or masked, or compressed. In one embodiment, bit subsets different from each other for storing the priority indicator values are selected based on a logical port associated with a packet and the final priority indicator value applied to a discriminated sub-table having a mapping of quality level values suitable for the logical port.

Abstract translation: 要解决的问题：提供一种用于向分组添加QOS级别的方法，装置和计算机程序。 解决方案：执行包括连续网络层的嵌套报头的多层网络通信的语法分析，并且与每个单独层的数据的优先级或服务质量要求（优先级指示符值）相关的值 提取分布在头组上的数据。 将聚合数据（合成聚合优先级值）应用于映射与较低分辨率质量等级值对应的不同可能组合聚合优先级值的表。 可以对优先级指示符值或组合聚合优先级值进行过滤，掩码或压缩。 在一个实施例中，基于与分组相关联的逻辑端口选择彼此不同的用于存储优先级指示符值的比特子集，并且应用于具有适合于所述优先级指示符的质量等级值的映射的被鉴别子表的最终优先级指示符值 逻辑端口 版权所有（C）2012，JPO＆INPIT

公开(公告)号：DE112016005363T5

公开(公告)日：2018-08-16

申请号：DE112016005363

申请日：2016-12-19

Applicant: IBM

Inventor： ABEL FRANCOIS ,  CLAUBERG ROLF ,  DOERING ANDREAS CHRISTIAN ,  SAGMEISTER PATRICIA ,  SCHMATZ MARTIN LEO

IPC: G06F3/00

Abstract: Ein von einem Computer umgesetztes Verfahren enthält ein Verwalten von Funktionsaufrufen zwischen einer Mehrzahl von Knoten und einem übergeordneten Knoten eines Rack-Systems mit einem verteilten Betriebssystem (OS). Das Betriebssystem enthält eine Mehrzahl von Funktionen, die in mindestens eine erste Klasse und eine zweite Klasse unterteilt sind, und jeder der Mehrzahl von Knoten schließt Funktionen in der zweiten Klasse aus. Das Verwalten der Funktionsaufrufe enthält ein Erfassen eines Aufrufs an eine erste Funktion auf einem ersten Knoten der Mehrzahl von Knoten. Es wird bestimmt, dass die erste Funktion zu der zweiten Klasse von Funktionen gehört und auf dem ersten Knoten nicht zur Verfügung steht. Der Aufruf an die erste Funktion wird zu dem übergeordneten Knoten weitergeleitet in Reaktion auf das Bestimmen, dass die erste Funktion zu der zweiten Klasse gehört, wobei der übergeordnete Knoten Code für die Funktionen in der zweiten Klasse enthält.

公开(公告)号：DE60302045D1

公开(公告)日：2005-12-01

申请号：DE60302045

申请日：2003-02-27

Applicant: IBM

Inventor： ABEL FRANCOIS ,  BENNER ALAN ,  DITTMANN GERO ,  HERKERSDORF ANDREAS

IPC: H04L12/801 ,  H04L12/803 ,  H04L12/851 ,  H04L29/08 ,  H04L12/56 ,  H04L29/06 ,  G06F15/80

Abstract: A method and systems for dynamically distributing packet flows over multiple network processing means and recombining packet flows after processing while keeping packet order even for traffic wherein an individual flow exceeds the performance capabilities of a single network processing means is disclosed. After incoming packets have been analyzed to identify the flow the packets are parts of, the sequenced load balancer of the invention dynamically distributes packets to the connected independent network processors. A balance history is created per flow and updated each time a packet of the flow is received and/or transmitted. Each balance history memorizes, in time order, the identifier of network processor having handled packets of the flow and the associated number of processed packets. Processed packets are then transmitted back to a high-speed link or memorized to be transmitted back to the high-speed link later, depending upon the current status of the balance history.

公开(公告)号：GB2502455A

公开(公告)日：2013-11-27

申请号：GB201312415

申请日：2011-12-12

Applicant: IBM

Inventor： VERPLANKEN FABRICE JEAN ,  CALVIGNAC JEAN ,  ABEL FRANCOIS ,  CHANG CHIH-JEN ,  PHILLIPE DAMON

IPC: G06F9/30 ,  H04L45/74

Abstract: The invention provides for a network processor comprising a parser, the parser being operable to work in normal operation mode or in repeat operation mode, the parser in normal operation mode loading and executing at least one rule in a first and a second working cycle respectively, the parser in repeat operation mode being operable to repeatedly execute a repeat-instruction, the execution of each repeat corresponding to one working cycle.

公开(公告)号：GB2495425A

公开(公告)日：2013-04-10

申请号：GB201222689

申请日：2011-05-25

Applicant: IBM

Inventor： ABEL FRANCOIS ,  GUSAT MIRCEA ,  MINKENBERG CYRIEL J A

IPC: G06F15/173 ,  G06F17/50 ,  H04L45/60

Abstract: The invention is directed to a switching device (S ij ) adapted to connects parts of a computer interconnection network, having N input ports (Ia - Ih) and N output ports (Oa - Oh), the device adapted for routing data packets by means of direct crosspoints (CP xy ), the direct crosspoints configured for enabling direct connectivity between each of the N input ports to a subset m

公开(公告)号：GB2530513A

公开(公告)日：2016-03-30

申请号：GB201416827

申请日：2014-09-24

Applicant: IBM

Inventor： VERPLANKEN FABRICE JEAN ,  ABEL FRANCOIS ,  ALDEBERT JEAN-PAUL ,  FRENOY JEAN-LUC

IPC: G06F9/30 ,  G06F9/38

Abstract: An action machine (i.e. a hardware accelerator) 400 for assembling response packets, e.g. Network Controller Sideband Interface (NC-SI) response packets, in a network processor (101, fig. 1) comprises: a first register array 405 adapted to store data for entry into fixed-length fields of differing response packets, a fixed-length field having the same length in the differing response packets (e.g. fields that are common for different NC-SI response packets); and a second register array 410 adapted to store data for entry into variable-length fields of differing response packets, a variable-length field having different values or lengths in the differing response packets (e.g. a variable-length payload). The action machine is adapted to assemble a response packet by combining data stored in the first register array with data stored in the second register array. First register array 405 may also store fields considered as being copied from a corresponding NC-SI command packet. Each byte-wide register of the first array 405 may be filled by a packet parser (207, fig. 2). A third register array 415 is adapted to stored selection data for writing data in second register array 410.

公开(公告)号：AT308185T

公开(公告)日：2005-11-15

申请号：AT03717246

申请日：2003-02-27

Applicant: IBM

Inventor： ABEL FRANCOIS ,  BENNER ALAN ,  DITTMANN GERO ,  HERKERSDORF ANDREAS

IPC: H04L12/801 ,  H04L12/803 ,  H04L12/851 ,  H04L29/08 ,  H04L12/56 ,  H04L29/06 ,  G06F15/80

Abstract: A method and systems for dynamically distributing packet flows over multiple network processing means and recombining packet flows after processing while keeping packet order even for traffic wherein an individual flow exceeds the performance capabilities of a single network processing means is disclosed. After incoming packets have been analyzed to identify the flow the packets are parts of, the sequenced load balancer of the invention dynamically distributes packets to the connected independent network processors. A balance history is created per flow and updated each time a packet of the flow is received and/or transmitted. Each balance history memorizes, in time order, the identifier of network processor having handled packets of the flow and the associated number of processed packets. Processed packets are then transmitted back to a high-speed link or memorized to be transmitted back to the high-speed link later, depending upon the current status of the balance history.

公开(公告)号：AU2003221530A8

公开(公告)日：2003-09-16

申请号：AU2003221530

申请日：2003-02-27

Applicant: IBM

Inventor： DITTMANN GERO ,  ABEL FRANCOIS ,  HERKERSDORF ANDREAS ,  BENNER ALAN

IPC: H04L12/801 ,  H04L12/803 ,  H04L12/851 ,  H04L29/08 ,  H04L12/56 ,  G06F15/80 ,  H04L29/06

Abstract: A method and systems for dynamically distributing packet flows over multiple network processing means and recombining packet flows after processing while keeping packet order even for traffic wherein an individual flow exceeds the performance capabilities of a single network processing means is disclosed. After incoming packets have been analyzed to identify the flow the packets are parts of, the sequenced load balancer of the invention dynamically distributes packets to the connected independent network processors. A balance history is created per flow and updated each time a packet of the flow is received and/or transmitted. Each balance history memorizes, in time order, the identifier of network processor having handled packets of the flow and the associated number of processed packets. Processed packets are then transmitted back to a high-speed link or memorized to be transmitted back to the high-speed link later, depending upon the current status of the balance history.

公开(公告)号：AU2003221530A1

公开(公告)日：2003-09-16

申请号：AU2003221530

申请日：2003-02-27

Applicant: IBM

Inventor： BENNER ALAN ,  DITTMANN GERO ,  HERKERSDORF ANDREAS ,  ABEL FRANCOIS

IPC: H04L12/801 ,  H04L12/803 ,  H04L12/851 ,  H04L29/08 ,  H04L12/56 ,  H04L29/06 ,  G06F15/80

Abstract: A method and systems for dynamically distributing packet flows over multiple network processing means and recombining packet flows after processing while keeping packet order even for traffic wherein an individual flow exceeds the performance capabilities of a single network processing means is disclosed. After incoming packets have been analyzed to identify the flow the packets are parts of, the sequenced load balancer of the invention dynamically distributes packets to the connected independent network processors. A balance history is created per flow and updated each time a packet of the flow is received and/or transmitted. Each balance history memorizes, in time order, the identifier of network processor having handled packets of the flow and the associated number of processed packets. Processed packets are then transmitted back to a high-speed link or memorized to be transmitted back to the high-speed link later, depending upon the current status of the balance history.

公开(公告)号：GB2502455B

公开(公告)日：2015-09-16

申请号：GB201312415

申请日：2011-12-12

Applicant: IBM

Inventor： VERPLANKEN FABRICE JEAN ,  CALVIGNAC JEAN ,  ABEL FRANCOIS ,  CHANG CHIH-JEN ,  PHILLIPE DAMON

IPC: G06F9/30 ,  H04L45/74

Abstract: Mechanisms are provided for a network processor comprising a parser, the parser being operable to work in normal operation mode or in repeat operation mode, the parser in normal operation mode loading and executing at least one rule in a first and a second working cycle respectively, the parser in repeat operation mode being operable to repeatedly execute a repeat-instruction, the execution of each repeat corresponding to one working cycle.