公开(公告)号：CA2055055A1

公开(公告)日：1992-06-12

申请号：CA2055055

申请日：1991-11-06

Applicant: IBM

Inventor： DINWIDDIE JOHN M JR ,  FREEMAN BOBBY J ,  SUAREZ GUSTAVO A ,  WILKIE BRUCE J

IPC: G06F3/048 ,  G06F3/14 ,  G09G1/16 ,  G09G5/00 ,  G06F15/62 ,  G06F13/20

Abstract: An information handling apparatus for transferring and composing image signals for display including a bus interface circuit adapted to allow selective access to a bus of an independent image signal generated by an independent image source. The selective access enables composition of the independent image signal in response to control information; the composition enables real time display of a composed image signal.

公开(公告)号：CA2055039A1

公开(公告)日：1992-06-12

申请号：CA2055039

申请日：1991-11-06

Applicant: IBM

Inventor： DINWIDDIE JOHN M JR ,  FREEMAN BOBBY J ,  SUAREZ GUSTAVO A ,  WILKIE BRUCE J

IPC: G06F3/153 ,  G06F3/14 ,  G09G1/16 ,  G09G5/00 ,  G09G5/14 ,  H04N5/262 ,  G06F15/62 ,  G06F13/20

Abstract: BC9-90-036 ABSTACT OF THE DISCLOSURE MEDIA CONTROL MODULE FOR A MULTIMEDIA SYSTEM An information handling apparatus for transferring and composing image signals for display. The apparatus including a media control module which provides control information to a bus. The control information controls selective access to the bus of multiple image signals generated by respective image sources. The selective access enables composition of the image signals in response to the control information. The media control module receives a composed image from the bus and provides the composed image to a display device in real time.

公开(公告)号：CA2009780A1

公开(公告)日：1990-11-17

申请号：CA2009780

申请日：1990-02-07

Applicant: IBM

Inventor： BAKER ERNEST D ,  DINWIDDIE JOHN M JR ,  GRICE LONNIE E ,  JOYCE JAMES M ,  LOFFREDO JOHN M ,  SANDERSON KENNETH R

IPC: G06F15/16 ,  G06F9/46 ,  G06F15/17 ,  G06F15/173 ,  G06F15/177

Abstract: The functions of two virtual opening systems (e.g. S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated form 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors across the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs to execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.

公开(公告)号：CA2009549A1

公开(公告)日：1990-11-17

申请号：CA2009549

申请日：1990-02-07

Applicant: IBM

Inventor： BAKER ERNEST D ,  DINWIDDIE JOHN M JR ,  GRICE LONNIE E ,  JOYCE JAMES M ,  LOFFREDO JOHN M ,  SANDERSON KENNETH R

IPC: G06F15/16 ,  G06F12/02 ,  G06F13/38

Abstract: The functions of two virtual operating systems (e.g. S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated form 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors across the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs to execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.

公开(公告)号：CA2009548A1

公开(公告)日：1990-11-17

申请号：CA2009548

申请日：1990-02-07

Applicant: IBM

Inventor： BAKER ERNEST D ,  DINWIDDIE JOHN M JR ,  GRICE LONNIE E ,  LOFFREDO JOHN M ,  SANDERSON KENNETH R ,  SUAREZ GUSTAVO A

IPC: G06F9/46 ,  G06F9/50 ,  G06F11/16 ,  G06F12/02 ,  G06F13/18 ,  G06F15/16 ,  G06F15/167 ,  G06F15/177

Abstract: The functions of two virtual operating systems (e.g. S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors dirertly and through the S/88 bus. Each S/370 processor is allocated form 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors across the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs to execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.

公开(公告)号：CA2009529C

公开(公告)日：1994-07-12

申请号：CA2009529

申请日：1990-02-07

Applicant: IBM

Inventor： DINWIDDIE JOHN M JR ,  GRICE LONNIE E ,  LOFFREDO JOHN M ,  SANDERSON KENNETH R

IPC: G06F15/16 ,  G06F9/46 ,  G06F9/48 ,  G06F11/00 ,  G06F11/16 ,  G06F11/20 ,  G06F11/22 ,  G06F13/24 ,  G06F13/28 ,  G06F15/173 ,  G06F15/177 ,  G11C29/00 ,  G06F9/00

Abstract: The functions of two virtual operating systems (e.g., S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated from 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors access the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.

公开(公告)号：BR9002297A

公开(公告)日：1991-08-06

申请号：BR9002297

申请日：1990-05-16

Applicant: IBM

Inventor： BAKER ERNEST D ,  DINWIDDIE JOHN M JR ,  GRICE LONNIE E ,  JOYCE JAMES M ,  LOFFREDO JOHN M ,  SANDERSON KENNETH R ,  SUZREZ GUSTAVO A

IPC: G06F11/18 ,  G06F11/00 ,  G06F11/10 ,  G06F11/16 ,  G06F11/20 ,  G06F15/16 ,  G06F15/173 ,  G06F15/177 ,  G06F13/00

Abstract: The functions of two virtual operating systems (e.g. S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated form 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors across the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs to execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.

公开(公告)号：BR9002281A

公开(公告)日：1991-08-06

申请号：BR9002281

申请日：1990-05-16

Applicant: IBM

Inventor： DINWIDDIE JOHN M JR ,  GRICE LONNIE E ,  LOFFREDO JOHN M ,  SANDERSON KENNETH R

IPC: G06F15/16 ,  G06F9/46 ,  G06F9/48 ,  G06F11/00 ,  G06F11/16 ,  G06F11/20 ,  G06F11/22 ,  G06F13/24 ,  G06F13/28 ,  G06F15/173 ,  G06F15/177 ,  G11C29/00

公开(公告)号：CA1148266A

公开(公告)日：1983-06-14

申请号：CA352390

申请日：1980-05-21

Applicant: IBM

Inventor： DINWIDDIE JOHN M JR

IPC: G06F5/06 ,  G06F12/06 ,  G06F13/16 ,  G06F13/40 ,  G06F1/00

Abstract: DATA INTERFACE MECHANISM FOR INTERFACING BIT -PARALLEL DATA BUSES OF DIFFERENT BIT WIDTH A data interface mechanism for interfacing bit-parallel data buses of different bit widths. This mechanism provides an automatic and efficient mechanism for converting data bytes into plural-byte data words and vice versa. The mechanism utilizes a plurality of random access (RAM) storage units located between the two data buses and an addressing structure wherein the higher order address bits are supplied to a chip select decoder to produce different chip select signals which are used to select different ones of the RAM units. For successive data transfers to or from the narrower data bus, storage addresses are used which produce different chip select signals which select the different RAM units one after the other in a sequence which repeats itself. Thus, successive data bytes to (from) the narrower bus are transferred from (to) the different RAM units in a rotating manner. For data transfers to or from the wider data bus, a storage address is used which produces a distinctive chip select signal which is different from those used for the individual narrower transfers. This distinctive chip select signal causes the storage control logic to simultaneously select all of the RAM units. This enables a simultaneous parallel transfer of data from all of the RAM units to the wider data bus or vice versa.

公开(公告)号：CA2009548C

公开(公告)日：1996-07-02

申请号：CA2009548

申请日：1990-02-07

Applicant: IBM

Inventor： BAKER ERNEST D ,  DINWIDDIE JOHN M JR ,  GRICE LONNIE E ,  LOFFREDO JOHN M ,  SANDERSON KENNETH R ,  SUAREZ GUSTAVO A

IPC: G06F9/46 ,  G06F9/50 ,  G06F11/16 ,  G06F12/02 ,  G06F13/18 ,  G06F15/16 ,  G06F15/167 ,  G06F15/177 ,  G06F12/00

Abstract: The functions of two virtual operating systems (e.g., S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated from 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors access the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/37C peer processor pairs execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.