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公开(公告)号：GB2604835A
公开(公告)日：2022-09-14
申请号：GB202208458
申请日：2020-10-28
Applicant: IBM
Inventor： THOMAS BOHNSTINGL , ANGELIKI PANTAZI , EVANGELOS STAVROS ELEFTHERIOU
IPC: G06N3/063
Abstract: Neuromorphic methods, systems and devices (10, 11, 12) are provided. The embodiment may include a neuromorphic device (10, 11, 12) which may comprise a crossbar array structure (110) and an analog circuit. The crossbar array structure (110) may include N input lines (111, 112) and M output lines (120) interconnected at junctions via N x M electronic devices (131, 132, 32a, 132b, 132c), which, in preferred embodiments, include, each, a memristive device. The input lines (111, 112) may comprise N 1 first input lines (111) and N 2 second input lines (112). The first input lines (111) may be connected to the M output lines (120) via N 1 x M first devices (131, 132) of said electronic devices (131, 132). Similarly, the second input lines (112) may be connected to the M output lines (120) via N 2 x M second devices (132) of said electronic devices (131, 132). The analog circuit (140, 150, 160, 170) may be configured to program the electronic devices (131, 132) so as for the first devices (131) to store synaptic weights and the second devices(132) to store neuronal states.
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公开(公告)号：GB2601701A
公开(公告)日：2022-06-08
申请号：GB202203329
申请日：2020-08-14
Applicant: IBM
Inventor： MARTINO DAZZI , PIER ANDREA FRANCESE , ABU SEBASTIAN , MANUEL LE GALLO-BOURDEAU , EVANGELOS STAVROS ELEFTHERIOU
Abstract: A method, computer system, and computer program product of performing a matrix convolution on a multidimensional input matrix for obtaining a multidimensional output matrix. The matrix convolution may include a set of dot product operations for obtaining all elements of the output matrix. Each dot product operation of the set of dot product operations may include an input submatrix of the input matrix and at least one convolution matrix. The method may include providing a memristive crossbar array configured to perform a vector matrix multiplication. A subset of the set of dot product operations may be computed by storing the convolution matrices of the subset of dot product operations in the crossbar array and inputting to the crossbar array one input vector comprising all distinct elements of the input submatrices of the subset.
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公开(公告)号：GB2565243B
公开(公告)日：2019-07-31
申请号：GB201816545
申请日：2017-02-24
Applicant: IBM
Inventor： EVANGELOS STAVROS ELEFTHERIOU , LUKAS KULL , ANGELIKI PANTAZI , ABU SEBASTIAN , TOMAS TUMA , MILOS STANISAVLJEVIC
IPC: G06N3/063
Abstract: Artificial neuron apparatus includes a resistive memory cell connected in an input circuit having a neuron input, for receiving neuron input signals, and a current source for supplying a read current to the cell. The input circuit is selectively configurable in response to a set of control signals, defining alternating read and write phases of operation, to apply the read current to the cell during the read phase and to apply a programming current to the cell, for programming cell resistance, on receipt of a neuron input signal during the write phase. The cell resistance is progressively changed from a first state to a second state in response to successive neuron input signals. The apparatus further includes an output circuit comprising a neuron output and a digital latch which is connected to the input circuit for receiving a measurement signal dependent on cell resistance.
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公开(公告)号：GB2492708B
公开(公告)日：2017-01-25
申请号：GB201219123
申请日：2011-03-23
Applicant: IBM
Inventor： ROY D CIDECIYAN , EVANGELOS STAVROS ELEFTHERIOU , THOMAS MITTELHOLZER
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公开(公告)号：GB2601415B
公开(公告)日：2022-12-14
申请号：GB202114411
申请日：2021-10-08
Applicant: IBM
Inventor： THOMAS BOHNSTINGL , ANGELIKI PANTAZI , STANISLAW ANDRZEJ WOZNIAK , EVANGELOS STAVROS ELEFTHERIOU
Abstract: The present disclosure relates to a storage device comprising a memory element. The memory element may comprise a changeable physical quantity for storing information. The physical quantity may be in a drifted state. The memory element may be configured for setting the physical quantity to an initial state. Furthermore, the memory element may comprise a drift of the physical quantity from the initial state to the drifted state. The initial state of the physical quantity may be computable by means of an initialization function. The initialization function may be dependent on a target state of the physical quantity and the target state of the physical quantity may be approximately equal to the drifted state of the physical quantity.
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Patent Agency Ranking
公开(公告)号：GB2599793A
公开(公告)日：2022-04-13
申请号：GB202112651
申请日：2020-02-14
Applicant: IBM
Inventor： GIOVANNI CHERUBINI , EVANGELOS STAVROS ELEFTHERIOU
Abstract: A computer-implemented method for answering a cognitive query from sensor input signals may be provided. The method comprises feeding sensor input signals to an input layer of an artificial neural network comprising a plurality of hidden neuron layers and an output neural layer, determining hidden layer output signals from each of the plurality of hidden neuron layers and output signals from the output neural layer, and generating a set of pseudo-random bit sequences by applying a set of mapping functions using the output signals of the output layer and the hidden layer output signals of one of the hidden neuron layers as input data for one mapping function. Furthermore, the method comprises determining a hyper-vector using the set of pseudo-random bit sequences, and storing the hyper-vector in an associative memory, in which a distance between different hyper-vectors is determinable.
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公开(公告)号：GB2513492B
公开(公告)日：2018-07-11
申请号：GB201411668
申请日：2012-11-20
Applicant: IBM
Inventor： EVANGELOS STAVROS ELEFTHERIOU , ROBERT HAAS , NILS HAUSTEIN , JENS JELITTO , ALEXANDER SAUPP , HARALD SEIPP
IPC: G06F3/06 , G06F12/08 , G06F12/0804 , G06F12/0871 , G06F12/123
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公开(公告)号：GB2552577A
公开(公告)日：2018-01-31
申请号：GB201708045
申请日：2015-10-13
Applicant: IBM
Inventor： EVANGELOS STAVROS ELEFTHERIOU , ANGELIKI PANTAZI , ABU SEBASTIAN , TOMAS TUMA
IPC: G06N3/063
Abstract: A neuromorphic synapse (11) comprises a resistive memory cell (15) connected in circuitry having first and second input terminals (21,22).These input terminals (21,22) respectively receive pre-neuron and post-neuron action signals, each having a read portion and a write portion, in use. The circuitry also has an output terminal (23) for providing a synaptic output signal which is dependent on resistance of the memory cell (15).The circuitry is operable such that the synaptic output signal is provided at the output terminal (23) in response to application at the first input terminal (21) of the read portion of the pre-neuron action signal,and such that a programming signal,for programming resistance of the memory cell (15), is applied to the cell (15) in response to simultaneous application of the write portions of the pre-neuron and post-neuron action signals at the first and second input terminals (21,22) respectively. The synapse (11) can be adapted for operation with identical pre-neuron and post-neuron action signals.
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公开(公告)号：GB2601415A
公开(公告)日：2022-06-01
申请号：GB202114411
申请日：2021-10-08
Applicant: IBM
Inventor： THOMAS BOHNSTINGL , ANGELIKI PANTAZI , STANISLAW ANDRZEJ WOZNIAK , EVANGELOS STAVROS ELEFTHERIOU
Abstract: A storage device comprising a memory element which comprises a changeable physical quantity for storing information, the physical quantity in a drifted state. The memory element being configured for setting the physical quantity to an initial state. The physical quantity of the memory element drifts from the initial state to the drifted state. The initial state of the physical quantity is computable by means of an initialization function, which depends on a target state of the physical quantity and the target state of the physical quantity is approximately equal to the drifted state of the physical quantity. An integrated circuit may further comprise an assembly of memory elements and further comprise a neuromorphic neuron apparatus for simulating a layer of a neural network. Other aspects refer to computer implemented methods for (i) setting up a storage device comprising a memory element or (ii) designing an initialization function. Initialization function may be f(G)=a*e-b*G+c where G is a selected target stage, f(G) is the corresponding initial state of the physical quantity and a,b,c are coefficients.
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公开(公告)号：GB2600545A
公开(公告)日：2022-05-04
申请号：GB202113291
申请日：2021-09-17
Applicant: IBM
IPC: G06N3/04
Abstract: Computer-implemented method of solving a cognitive task that includes learning abstract properties, comprising: accessing datasets characterising the abstract properties from an input unit; inputting the datasets into a first neural network of a neural network module; executing the first neural network to generate first embeddings; forming pairs of the first embeddings, wherein the pairs correspond to pairs of the datasets; inputting data corresponding to the formed pairs into a second neural network of the neural network module; executing the second neural network to generate second embeddings that capture relational properties of the pairs of datasets; executing a third neural network of the neural network module based on the second embeddings to obtain output values; and learning one or more abstract properties of the datasets based on the output values, to solve a cognitive task. The first neural network may be a convolutional neural network, and the second and third neural network may each be a fully-connected neural network. Forming the pairs of first embeddings may comprise concatenating the pairs, and data corresponding to the formed pairs may include concatenated values forming a single vector for each pair.
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