公开(公告)号：JP2003196083A

公开(公告)日：2003-07-11

申请号：JP2001393336

申请日：2001-12-26

Applicant: IBM

Inventor： YOSHIYAMA NORITOSHI ,  KONO SEIICHI ,  KOMIYAMA HIROHIDE ,  MATSUSHIMA SHINJI

IPC: G06F9/30 ,  G06F1/04 ,  G06F1/32 ,  G06F9/318 ,  G06F15/78

Abstract: PROBLEM TO BE SOLVED: To provide a practical means for restraining electric power consumption by reducing operational performance of a CPU, and restraining the electric power consumption and generation of heat of the whole system when the CPU requires waiting time in the relationship with a device and is processing a program. SOLUTION: A command code executed by the CPU 101 and information on the operational performance when executing this command code are loaded in the CPU 101, and the operational performance of the CPU 101 is dynamically set to a value determined on the basis of the loaded information on the operational performance so that the CPU 101 executes this command code by the preset operational performance. COPYRIGHT: (C)2003,JPO

公开(公告)号：JP2002297275A

公开(公告)日：2002-10-11

申请号：JP2001102341

申请日：2001-03-30

Applicant: IBM

Inventor： SUGAWARA TAKASHI ,  KOMIYAMA HIROHIDE

IPC: G06F3/00 ,  G06F13/00 ,  G06F13/40 ,  H04L29/14

Abstract: PROBLEM TO BE SOLVED: To provide a data transferring device, a computer device, a device, and a docking station capable of stabilizing the signal waveform at the time of transferring data. SOLUTION: In this PC system, at the time of transferring data between a host part 10 and an HDD device 40 or a CD-ROM drive device 30 through an IDE bus 20, a signal is fed back from the reception side of the data through a feedback circuit 50 to the transmission side of the data so that the through- rate of a signal to be transmitted at the transmission side can be changed based on this. Moreover, when the CD-ROM drive device 30 or the HDD device 40 is attached or detached while the power source of the PC system is applied, calibration is performed by a calibration performing part 83 so that the through- rate of a signal to be transmitted at the transmission side can be changed.

公开(公告)号：JP2004280269A

公开(公告)日：2004-10-07

申请号：JP2003068272

申请日：2003-03-13

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： YOSHIYAMA NORITOSHI ,  KONO SEIICHI ,  KOMIYAMA HIROHIDE ,  NAKAMURA TETSUSHI

IPC: G06F1/32 ,  G06F12/08

CPC classification number: G06F12/0888 ,  G06F1/3203 ,  G06F1/3275 ,  G06F12/0835 ,  G06F12/0837 ,  G06F2212/1028 ,  G06F2212/621 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D50/20

Abstract: PROBLEM TO BE SOLVED: To provide an information processor or the like allowing reduction of electric power consumption. SOLUTION: This information processor 10 has a normal operation mode for executing consistency control for bringing contents of a cache memory of a processor into line with contents of a main memory, and a power-saving operation mode for reducing the power consumption as compared with the normal operation mode without executing the consistency control, and changes over the power-saving operation mode to the normal operation mode when an input/output device accesses the main memory in the power-saving operation mode. The information processor 10 has: an attribute setting part setting a device area that is an area accessed by the input/output device of the information processor, of the main memory, to a non-cacheble attribute wherein the consistency control is not executed even in the normal operation mode; and an operation mode setting part making the input/output device access the device area with the operation mode of the information processor kept in the power-saving operation mode when the input/output device requests the access to the device area in the power-saving operation mode. COPYRIGHT: (C)2005,JPO&NCIPI

公开(公告)号：JP2002207565A

公开(公告)日：2002-07-26

申请号：JP2000385712

申请日：2000-12-19

Applicant: IBM

Inventor： NAKANO MASATAKE ,  KOMIYAMA HIROHIDE ,  AKAI TAKAYUKI

IPC: B43K8/02 ,  B43K24/12 ,  G06F3/033 ,  G06F3/041 ,  G06F3/046 ,  G06F3/03

Abstract: PROBLEM TO BE SOLVED: To provide an input device for electronically recording a locus written by a pen capable of performing the input with varied kind or color of pen. SOLUTION: This device comprises the pen 30 having plural kinds of pen points differed in color, thickness or the like so as to be selectable of a prescribed pen point from the pen points and a digitizer 50 for grasping the locus drawn by the selected pen point of the pen 30 and recognizing the attribute for the kind of the pen point. The position information obtained from the locus of the pen point grasped by the digitizer 50 and the attribute information related to the recognized attribute of the kind of pen point are outputted to a computer device 10 through a connecting cable 9.

公开(公告)号：JP2001035605A

公开(公告)日：2001-02-09

申请号：JP19321999

申请日：1999-07-07

Applicant: IBM

Inventor： KOMIYAMA HIROHIDE ,  FUKUSHIMA AKIRA ,  NAKANO MASATAKE

IPC: G06F1/18 ,  H01R13/703 ,  H02G3/30

Abstract: PROBLEM TO BE SOLVED: To simplify wiring of a controller and an I/O connector by mounting a connector cable for an outside device so that a contact part comes in contact with the contact part of the contact cable and the contact part does not come in contact with a return pin part. SOLUTION: When a connector cable 5 for an outside device is not inserted into a hole 3, the tip 11a of a return pin part 11 comes in contact with the tip 4a of a contact part 4. In this state, a signal supplied to the contact part 4 is transmitted to the return pin part 11. When the connector cable 5 is inserted into the hole 3, the tip 11 a of the return pin part 11 and the tip 4a of the contact part 4 are separated each other and the contact part 4 comes in contact with a contact part 6 of the connector cable 5. In this state, the signal supplied to the contact part 4 is not transmitted to the return pin part 11 and is transmitted to the contact part 6 of the connector cable 5.

公开(公告)号：JP2001307832A

公开(公告)日：2001-11-02

申请号：JP2000114328

申请日：2000-04-14

Applicant: IBM

Inventor： USUI HIDEYUKI ,  KOMIYAMA HIROHIDE ,  NAKANO MASATAKE

IPC: H01R13/648 ,  H01R13/658 ,  H01R13/6581

Abstract: PROBLEM TO BE SOLVED: To obtain a connector wherein an earthing of the whole connector is strengthened and wherein the stabilization of action of an electronic equipment for EMI/ESD is aimed at. SOLUTION: As for an interface connector 10, protruding portions 14A, 14B and 14C are respectively formed at an upper face 12A and lower surface 12B of a metal shell 12. The relationship of height among these protruding portions has become; protruding portion 14A > protruding 14B > protruding portion 14C. By this, even if a metal shell of counterpart connector is fitted into a metal shell 12 and the central part of the shell inside face is deformed to swell out, a difference of contact pressure at the protruding portions 14A, 14B and 14C can be made small.

公开(公告)号：JP2000259510A

公开(公告)日：2000-09-22

申请号：JP6654799

申请日：1999-03-12

Applicant: IBM

Inventor： SUGAWARA TAKASHI ,  KOMIYAMA HIROHIDE ,  HANAMI HIDENOBU

IPC: G06F13/36 ,  G06F13/00 ,  G06F13/40

Abstract: PROBLEM TO BE SOLVED: To easily analyze the fault of an information processing system by examining a transaction on a primary side bus from the connector or slot of a bus bridge circuit in the manner of no destruction. SOLUTION: A jumper 60 is arranged as a control input means for switching the operating mode of a card bus controller 42, bidirectional bypass routes 40A, 66 and 58A are arranged parallel to the controller 42, the operation of the controller 42 is enabled/disabled and the operation of the bypass route is disabled/enabled corresponding to the inactive/active state of a pass through mode signal 64 from the jumper 60. A prescribed signal on a PCI bus signal line 40A or signal on a card bus signal line 58A corresponding to the prescribed signal is outputted through the bypass route onto a card bus or PCI bus as it is. In order to examine the transaction on the PCI bus, a PCI bus analyzer or exerciser is connected to a PC card slot 44A to which the bypass route is connected.

公开(公告)号：JPH11110332A

公开(公告)日：1999-04-23

申请号：JP24886397

申请日：1997-09-12

Applicant: IBM

Inventor： SUGAWARA TAKASHI ,  KOMIYAMA HIROHIDE

IPC: G06F13/14 ,  G06F1/18 ,  G06F13/40

Abstract: PROBLEM TO BE SOLVED: To achieve both of connection failure and identification by using the minimum number of pins in a connector that is used for connection. SOLUTION: This external equipment has a 1st identification pin group that consists of more than one pin on the side of one edge in the longitudinal direction of connecting connectors 21A to C, a 2nd identification pin group that comprises more than two pins on the side of the other edge and a control pint that is allocated to one pin of one edge side and connects at least one pin in the 2nd identification pin group to the control pin, and also, each pin in other 1st and 2nd identification pin groups forms identification information through its connection or disconnection to/from the control pin. When a 1st signal level is supplied to the control pin on the external device side, if any of the 2nd identification pin group shows the 1st signal level, both ends of a connector normally come into contact. Also, an external device can be identified by the combination of the signal level of each pin of the 1st and 2nd identification pin groups.

公开(公告)号：JPH05289868A

公开(公告)日：1993-11-05

申请号：JP3484292

申请日：1992-02-21

Applicant: IBM

Inventor： KONO SEIICHI ,  KOMIYAMA HIROHIDE ,  MUKOYAMA SHUICHI

IPC: G06F9/32 ,  G06F9/34 ,  G06F9/38

Abstract: PURPOSE: To perform normal switching by prereading an instruction, which will be executed following an instruction for address generation mode switching, to hold it in a prefetch queue at the time of executing the instruction for address generation mode switching. CONSTITUTION: JMP +2 is executed to flash a prefetch queue 2A, and contents of a DRO register are temporarily transferred to an EDX register and are returned to the DRO register by execution of MOV DRO and EDX. An instruction prefetch unit 2 prereads an instruction to store it in a prefetch queue 2A in the middle or execution or these instructions MOV DRO and EDX. Since the instruction (JMP offset value, selector value)to be executed following instructions MOV CRO and EAX for mode switching is fetched in a prefetch queue 2A, the system is prevented from being hung or malfunctioning because of transfer of the control to an erroneous address just after mode switching.