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公开(公告)号:FR2330142A1
公开(公告)日:1977-05-27
申请号:FR7628377
申请日:1976-09-14
Applicant: IBM
Inventor: KEENAN WILLIAM A , KROLL CHARLES T
IPC: H01L21/265 , H01L21/266 , H01L21/318
Abstract: The disclosure teaches the use of aluminum nitride as a mask for utilization of ion implantation in the formation of semiconductor configurations as well as an underlying material for use in semiconductor lift-off techniques in device formation and the deposition of metallization contact lines and interconnections.
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公开(公告)号:CA1168916A
公开(公告)日:1984-06-12
申请号:CA400827
申请日:1982-04-13
Applicant: IBM
Inventor: FARRAR PAUL A , GEFFKEN ROBERT M , KROLL CHARLES T
IPC: H01L23/522 , H01L21/027 , H01L21/28 , H01L21/768 , H05K3/07
Abstract: A method for providing high density multiple level metallurgy for integrated circuit devices in which a relatively thin layer of plasma produced silicon nitride is deposited over a first level of interconnection metallurgy formed on a layer of silicon oxide. Overlap via holes are etched in the nitride layer followed by deposition of a thicker layer of polyimide forming polymer. A second set of via holes larger than the first are provided in the polymer layer and a second layer of interconnection metallurgy is then deposited by a lift-off deposition technique. BU9-79-015
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公开(公告)号:FR2316740A1
公开(公告)日:1977-01-28
申请号:FR7615011
申请日:1976-05-13
Applicant: IBM
Inventor: BHATTACHARYYA ARUP , JOSHI MADHUKAR L , KROLL CHARLES T , SILVERMAN RONALD
IPC: H01L27/112 , G11C17/00 , G11C17/08 , H01L21/3105 , H01L21/8246 , H01L21/8247 , H01L27/088 , H01L29/51 , H01L29/788 , H01L29/792 , H01L27/04 , H01L21/72 , G11C11/40
Abstract: Fully integrated non-volatile and fixed threshold field effect devices are fabricated in N-channel technology on a single semiconductor substrate. MOSFET devices of the metal-nitride-oxide-semiconductor (MNOS) devices are used both as fixed threshold support devices and as variable threshold non-volatile memory array devices. Extremely stable and reproducible device characteristics result from the use of low charge containing dielectrics which allow optimum variable threshold stability and allow the use of operating potentials compatable with conventional fixed threshold FET devices. Low temperature processing following deposition of variable threshold gate dielectric enables all enhancement mode operation. A field oxide structure including a thin silicon dioxide layer, an aluminum oxide layer and a nitride layer provides parasitic threshold voltages in excess of 60 volts and prevents sub-threshold leakage.
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