公开(公告)号：CA2015214C

公开(公告)日：1996-01-02

申请号：CA2015214

申请日：1990-04-23

Applicant: IBM

Inventor： BONO RICHARD C ,  BRANDT HENRY R ,  CAVAGNARO HAROLD F ,  LEE ARLIN E ,  NORTON DARWIN W JR ,  SHALKEY ERIC T ,  SILSBEE DAVID L ,  WEHRLY DAVID S ,  WILLIAMS CLIFFORD T ,  ZIMMERMAN TERRENCE K

IPC: G06F13/12 ,  G06F13/42 ,  G06F15/17 ,  G06F13/00

Abstract: This embodiment provides apparatus and method for implementing a High Speed Link (HSL) such as the newly proposed ANSI High Performance Parallel interface (HPPI) standard on processors complexes like the IBM? 3090TM having a paging store with an independent bus. A high speed link adapter (HSLA) including input and output buffers and controls is coupled to the independent bus under program control. Program access to high speed link is obtained by an extension to the Page-in and Page-out instructions.

公开(公告)号：CA2015214A1

公开(公告)日：1990-11-30

申请号：CA2015214

申请日：1990-04-23

Applicant: IBM

Inventor： BONO RICHARD C ,  BRANDT HENRY R ,  CAVAGNARO HAROLD F ,  LEE ARLIN E ,  NORTON DARWIN W JR ,  SHALKEY ERIC T ,  SILSBEE TERRENCE K ,  WEHRLY DAVID S ,  WILLIAMS CLIFFORD T ,  ZIMMERMAN TERRENCE K

IPC: G06F13/12 ,  G06F13/42 ,  G06F15/17

Abstract: The disclosed arrangement provides apparatus and method for implementing a High Speed Link (HSL) such as the newly proposed ANSI High-Speed Channel (HSC) standard on processors complexes like the IBM 3090 having a paging store with an independent bus. A high speed link adapter (HSLA) including input and output buffers and controls is coupled to the independent bus under program control. Program access to high speed link is obtained by an extension to the Page-in and Page-out instructions.

公开(公告)号：CA986230A

公开(公告)日：1976-03-23

申请号：CA180753

申请日：1973-09-11

Applicant: IBM

Inventor： AHEARN THOMAS P ,  CHRISTENSEN NEAL T ,  GANNON PATRICK M ,  LEE ARLIN E ,  LIPTAY JOHN S ,  CAPOWSKI ROBERT S

IPC: G06F12/10

Abstract: This specification describes a virtual memory system in which a set of conversion tables is used to translate an arbitrarily assigned programming designation called a virtual address into an actual main memory location called a real address. To avoid the necessity of translating the same addresses over and over again, a table called the Directory Look Aside Table (DLAT) retains current virtual to real address translations for use where particular virtual addresses are requested more than once. Each translation retained by the DLAT is identified by an identifier (ID) that signifies the set of tables used in that translation. This identifier is compared with an identifier generated for the currently requested virtual address. If these identifiers match and the virtual address retained in the DLAT matches the currently requested virtual address, the translation stored in the DLAT may be used. If the identifiers or virtual address don't match, a new translation must be performed using the set of conversion tables associated with the currently requested address.