公开(公告)号：DE3483070D1

公开(公告)日：1990-10-04

申请号：DE3483070

申请日：1984-06-20

Applicant: IBM

Inventor： EILERT JOHN H ,  LEVIN ARTHUR L ,  THOMAS JULIAN

IPC: G06F11/34

Abstract: A plurality of instrumentation table units (ITUs) is provided at various locations in a data processing system to collect sampled local signals, e.g. in each CPU, I/O processor, system controller, main storage controller, etc. While instrumentation is active, each ITU (30) samples internal system signals local to the ITU. Sampling of the system signals is done periodically at a low-rate relative to the CPU machine cycle rate, and the sampled signals are collected and stored in the ITUs for instrumentation analysis. Sampling pulses are synchronously distributed (55) to all ITUs in the system to synchronize corresponding addresses in every ITU storage array in the system. Their addresses are incremented in unison by each next sampling pulse to maintain address synchronism, after an initial reset on all ITUs in the system to start them all at the same address. Signal states captured in each currently addressed ITU entry are those existing at the time that a sampling pulse switches the address. The ITU collected hardware signals are related to software trace entries made in a trace table (TT) in main storage by each CPU in the system. Trace instruction execution and TT entry generation occurs asynchronously in relation to the sampling pulses and ITU signal collection. This asynchronous relationship between the ITU entries and the TT entries is bridged by providing an intervening table, called SAT, located in hidden storage, and address-synchronized with the ITUs correspondingly incrementing the SAT address with each sampling pulse. A SAT entry receives the time-of-day (TOD) value provided to the last entry made in an associated TT entry by the execution of a trace (TR) instruction. The TOD value provides a correlation code between the SAT entry and the TT entry. Also, a comment code provided in an operand of a TR instruction (which is put into a TT entry) may also be put into a related SAT entry. The contents of the ITUs, SATs and TTs are put on an I/O device for analysis.

公开(公告)号：DE3483120D1

公开(公告)日：1990-10-11

申请号：DE3483120

申请日：1984-06-20

Applicant: IBM

Inventor： GUM PETER H ,  SMITH RONALD M ,  LEVIN ARTHUR L ,  WILSON JOHN H

IPC: G06F11/28 ,  G06F11/36 ,  G06F15/16 ,  G06F15/177 ,  G06F11/00

Abstract: The method provides a separate trace table (TT) for each CPU in an MP (multiprocessor) to avoid inter-CPU interference in making trace table entries (16) for explicit and implicit tracing instructions enabled by flag bits (E, A, B) in a control register (CR). Explicit tracing entries are made for an enabled explicit tracing (TR) instruction (11). Implicit tracing entries are made for predetermined instructions (when enabled for tracing) which do not have tracing as their primary purpose. A storage operand (12) of the trace instruction (11) contains a disablement field (T) and optionally may contain an enablement-controlling class field (4...7) to improve the integrity of traceable programs. A time stamp and a range of general register (R1...R3) contents is provided in each trace table entry for a tracing instruction. The time stamp enables all trace tables in an MP system to be later merged into a single trace table whenever required.

公开(公告)号：CA1175573A

公开(公告)日：1984-10-02

申请号：CA413263

申请日：1982-10-12

Applicant: IBM

Inventor： CORMIER ROGER L ,  DUGAN ROBERT J ,  GUYETTE RICHARD R ,  HANKISON RONALD L ,  HAO MING C ,  LEVIN ARTHUR L ,  MCCLAIN GEORGE A ,  WANISH PAUL J ,  ZEITLER CARL JR

IPC: G06F3/00 ,  G06F11/34 ,  G06F9/00 ,  G06F15/00

Abstract: P09-78-018 METHOD AND APPARATUS FOR MEASUREMENTS OF CHANNEL OPERATION A channel for a data processing system is provided with a time of day clock that is synchronized with the time of day clock of the associated central processor. Both the central processor and the channel processor record times of particular events, and the channel uses these times to calculate two times called Function Pending and Function Active. Both times begin when the central processor executes an instruction to begin an I/O operation. Function Pending ends when the channel has made successful initial selection. This time shows delays by the channel processor in scheduling the channel resources for I/O operations. Function Active ends at Channel End. A new instruction, Set Channel Monitor, enables or disables these measurements. An information block for each subchannel defines one of several measurement modes for a subchannel or disables the subchannel from measurement.