公开(公告)号：US3898623A

公开(公告)日：1975-08-05

申请号：US36728173

申请日：1973-06-05

Applicant: IBM

Inventor： CORMIER ROGER L

IPC: G06F13/10 ,  G06F3/00 ,  G06F9/18

CPC classification number: G06F13/10 ,  G05B2219/34365

Abstract: An input/output subsystem in which a peripheral device controller controls the device in response to commands received from an input/output (I/O) channel which is connected to a processor. A channel address word (CAW) and a sequence of channel command words (CCW''s) are fetched from a main memory and executed by the I/O channel. If a delay condition such as a paging fault in a virtual memory occurs, the channel signals the device controller over an interface. In response to the signal, the device controller turns on a suspend latch and sets zero status which is returned to the I/O channel. After the paging fault or the delay condition has been corrected by the processor, the channel operation is continued by issuing a restart I/O instruction. In executing the restart I/O instruction, the channel turns on a restart latch and validates the previous CCW and CAW fetches. The channel program starts at the point where a command is gated to the device and since the restart latch is on, a command of zero is gated. A command of zero received at the I/O controller plus the condition that the suspend latch is on, causes the controller to resume the suspended operation at the point where it was discontinued. Since the previous CCW and CAW fetch have been validated, the control unit operation reenters the channel program at the point of suspension.

Abstract translation: 输入/输出子系统，其中外围设备控制器响应于从连接到处理器的输入/输出（I / O）通道接收的命令来控制设备。 通道地址字（CAW）和通道命令字序列（CCW）从主存储器中取出并由I / O通道执行。 如果出现诸如虚拟存储器中的寻呼故障的延迟状况，则该信道通过接口向设备控制器发信号。 响应该信号，设备控制器打开一个挂起锁存器，并设置返回到I / O通道的零状态。 在寻呼故障或延迟状态由处理器校正之后，通过发出重启I / O指令来继续通道操作。 在执行重新启动I / O指令时，通道会启动一个重新启动锁定，并验证以前的CCW和CAW提取。 通道程序从命令门控到设备的点开始，并且由于重新启动锁存器处于打开状态，所以门限为零。 在I / O控制器上接收的零指令加上挂起锁存器的状态，导致控制器在停止运行的时候恢复暂停运行。 由于先前的CCW和CAW提取已被验证，所以控制单元操作在暂停点重新输入通道程序。

公开(公告)号：US3688274A

公开(公告)日：1972-08-29

申请号：US3688274D

申请日：1970-12-23

Applicant: IBM

Inventor： CORMIER ROGER L ,  SORG JOHN H JR ,  THORN CARYL A

IPC: G06F11/14 ,  G06F13/00 ,  G06F13/12 ,  G06F3/04

CPC classification number: G06F11/141 ,  G06F13/122 ,  G06F13/126

Abstract: An input/output subsystem in which a peripheral device controller controls the device in response to commands received from an input/output (I/O) channel. A sequence of channel command words (CCWs) are stored in sequential addresses in a main memory. Some CCWs contain commands, other CCWs contain memory addresses for data but no commands. An initial instruction to the channel gives the channel the address where the first CCW is stored in the memory. The location address of the last CCW in the sequence containing a command is retained in a back-up register in the channel. Further CCWs are chained to the CCW containing the command to provide scattered addresses the the memory for the storage of blocks of data. At the completion of the data transfer operation associated with a CCW, the location address of the CCW is incremented by one address to thereby specify the next sequential address and hence, the next CCW. The next CCW contains an address at which further data are to be stored. The occurrence of a signal from the I/O device indicating an error or a nonerror condition, either of which conditions require the retrying of the original command, causes the channel to utilize the retained address to fetch the control work containing the command. This provides a way of backing up in the channel program without interrupting the computer to retry the original initializing command even though intervening control words were executed.

Abstract translation: 输入/输出子系统，其中外围设备控制器响应于从输入/输出（I / O）通道接收的命令来控制设备。 信道命令字序列（CCW）存储在主存储器中的顺序地址中。 一些CCW包含命令，其他CCW包含数据的内存地址，但没有命令。 通道的初始指令给出通道第一个CCW存储在存储器中的地址。 包含命令的序列中最后一个CCW的位置地址保留在通道中的备份寄存器中。 进一步的CCW被链接到CCW，其中包含提供用于存储数据块的存储器的分散地址的命令。 在与CCW相关联的数据传送操作完成时，CCW的位置地址增加一个地址，从而指定下一个顺序地址，因此指定下一个CCW。 下一个CCW包含要存储更多数据的地址。 来自I / O设备的信号的出现指示错误或非错误状态，其中任一条件要求重试原始命令，使得该通道利用保留的地址来获取包含该命令的控制工作。 这提供了在通道程序中备份的方式，而不会中断计算机重试初始化初始化命令，即使执行了中间的控制字。

公开(公告)号：CA1176379A

公开(公告)日：1984-10-16

申请号：CA403594

申请日：1982-05-21

Applicant: IBM

Inventor： CORMIER ROGER L ,  DUGAN ROBERT J ,  GUYETTE RICHARD R ,  WANISH PAUL J ,  ZEITLER CARL JR

IPC: G06F13/12 ,  G06F13/14 ,  G06F13/40 ,  G06F15/177 ,  H04L69/14 ,  G06F3/04

Abstract: PO9-79-010 METHOD FOR ESTABLISHING VARIABLE PATH GROUP ASSOCIATIONS AND AFFILIATIONS BETWEEN "NON-STATIC" MP SYSTEMS AND SHARED DEVICES Multiprocessing systems having changeable CPU configurations generate unique changeable identifications (ID's). These are presented by I/O channels over various I/O connection paths, in association with special path defining commands and function data. Related path state indications are stored peripherally in path map tables and define path group associations for sustaining path-independent I/O operations. When a device is reserved via one path in a path group the reserve affiliation is extended automatically (in the path tables) to each path in the group, thereby rendering each path accessible in a reserved mode. The path defining commands are used for adding paths to, resigning paths from and disbanding groups. Special sensing commands axe used for sensing path reservation and grouping states. When a command for adding or resigning a path is presented to a reserved device via one path in a group the reserve is automatically realigned to the enlarged or reduced group. When a command for disbanding a group is presented to a reserved device the reserve is realigned to apply only to the path on which the command is presented. The foregoing special commands are required to be obeyed by the device even if it currently has a conflicting allegiance to the same system or another system. Consequently, paths can be added to an established path group without requiring potentially premature release of any allegiance.

公开(公告)号：CA1156767A

公开(公告)日：1983-11-08

申请号：CA364528

申请日：1980-11-12

Applicant: IBM

Inventor： BURK JOHN L ,  CORMIER ROGER L ,  HARTUNG MICHAEL H ,  LARNER RAY A ,  LUCAS DONALD J ,  LYNCH KENNETH R ,  MOORE BRIAN B ,  PAGE HOWARD L ,  WANSOR DAVID H ,  ZEITLER CARL JR

IPC: G06F13/00 ,  G06F13/12 ,  G06F15/167 ,  G06F9/00 ,  G06F15/00

Abstract: Secondary storage subsystems exchange messages and data with host data processing systems and also forward messages between host systems. Host systems thereby communicate with each other in addition to having access to data in subsystem storage. Access to subsystem storage is initiated by a "request" sent from a host to the subsystem. Each request is a message containing an array of one or more commands, each command specifying a transfer of data or a control function to be performed by the subsystem. A subsystem may process more than one request at a time. It also may process the commands in a request in an arbitrary sequence suited to the availability of subsystem resources and data links to host systems. After all commands in a request have been processed the subsystem transmits an associated "completion" message to the host system which originated the request. The completion message indicates the status of completion or abnormal termination of each command in the associated request. An "adapter" processor associated with each host and subsystem operates on an asynchronous basis to transfer messages and data relative to the associated host or subsystem. One or more processing "engines" in each adapter communicates with one or more CPU's in the associated host or subsystem through an associated "adapter store". A portion of each adapter store is used as a buffer pool for constructing "subchannel control spaces" to control transfers of messages and data. Elements of each subchannel control space are returned to free status as soon as they are not needed for sustaining associated transfers. PO9-78-012

公开(公告)号：CA951435A

公开(公告)日：1974-07-16

申请号：CA130047

申请日：1971-12-14

Applicant: IBM

Inventor： CORMIER ROGER L ,  SORG JOHN H JR ,  THORN CARYL A

IPC: G06F11/14 ,  G06F13/00 ,  G06F13/12

公开(公告)号：CA1175573A

公开(公告)日：1984-10-02

申请号：CA413263

申请日：1982-10-12

Applicant: IBM

Inventor： CORMIER ROGER L ,  DUGAN ROBERT J ,  GUYETTE RICHARD R ,  HANKISON RONALD L ,  HAO MING C ,  LEVIN ARTHUR L ,  MCCLAIN GEORGE A ,  WANISH PAUL J ,  ZEITLER CARL JR

IPC: G06F3/00 ,  G06F11/34 ,  G06F9/00 ,  G06F15/00

Abstract: P09-78-018 METHOD AND APPARATUS FOR MEASUREMENTS OF CHANNEL OPERATION A channel for a data processing system is provided with a time of day clock that is synchronized with the time of day clock of the associated central processor. Both the central processor and the channel processor record times of particular events, and the channel uses these times to calculate two times called Function Pending and Function Active. Both times begin when the central processor executes an instruction to begin an I/O operation. Function Pending ends when the channel has made successful initial selection. This time shows delays by the channel processor in scheduling the channel resources for I/O operations. Function Active ends at Channel End. A new instruction, Set Channel Monitor, enables or disables these measurements. An information block for each subchannel defines one of several measurement modes for a subchannel or disables the subchannel from measurement.