Abstract:
Disclosed is a bipolar transistor and a method of forming the transistor, where the transistor includes a collector (12) in a substrate (10), an intrinsic base (14) above the collector, an extrinsic base adjacent the intrinsic base, and an emitter (130) above the intrinsic base. The extrinsic base includes extrinsic base implant regions (82, 172, 192) adjacent the intrinsic base, when viewed in cross-section. The transistor is formed by patterning an emitter pedestal (50) for the lower portion of the emitter on the substrate above the intrinsic base. The extrinsic base is formed in regions not protected by the emitter pedestal. Subsequently, the emitter, associated spacers (180) and a silicide region (220) are formed. The silicide, extrinsic base and emitter are all self-aligned with each other.
Abstract:
PROBLEM TO BE SOLVED: To provide a self-adjusting bipolar transistor structure having a projecting exogenous base provided with external and internal regions with different dope densities, and to provide its manufacturing method. SOLUTION: The first material of a first dope density is provided so that an exogenous base external region is formed. Then, a first opening is formed in the first material's layer by lithography into which a dummy emitter pedestal is formed, and by which a trench is formed between a side wall of the first opening and the dummy pedestal. Thereafter, the second material of a second dope density is provided within this trench, and another exogenous base internal extension region is formed whose projecting external base marginal part self-adjusts to a dummy pedestal marginal part. Since the emitter is formed where there were the dummy pedestals, this exogenous base also self-adjusts to the emitter. COPYRIGHT: (C)2005,JPO&NCIPI
Abstract:
A bipolar transistor with raised extrinsic base and selectable self-alignment between the extrinsic base and the emitter (106) is disclosed. The fabrication method may include the formation of a predefined thickness of a first extrinsic base layer (102) of polysilicon or silicon on an intrinsic base (108). A dielectric landing pad (128) is then formed by lithography on the first extrinsic base layer (102). Next, a second extrinsic base layer (104) of polysilicon or silicon is formed on top of the dielectric landing pad (128) to finalize the raised extrinsic base total thickness. An emitter (106) opening is formed using lithography and RIE, where the second extrinsic base layer (104) is etched stopping on the dielectric landing pad (128). The degree of self-alignment between the emitter (106) and the raised extrinsic base is achieved by selecting the first extrinsic base layer (102) thickness, the dielectric landing pad (128) width, and the spacer width.