Abstract:
A method for forming preferably Pb-lead C4 connections or capture pads with ball limiting metallization on an integrated circuit chip by using a damascene process and preferably Cu metallization in the chip and in the ball limiting metallization for compatibility. In two one embodiment, the capture pad is formed in the top insulating layer and it also serves as the final level of metallization in the chip.
Abstract:
PROBLEM TO BE SOLVED: To provide structures with improved solder bump connections that prevent cracking and peeling, and to provide a method of fabricating such structures. SOLUTION: The method includes steps of: forming an upper wiring layer in dielectric layers 10, 20 and 22; and depositing one or more dielectric layers on the upper wiring layer. The method further includes a step of forming a plurality of discrete trenches in the one or more dielectric layers extending to the upper wiring layer. The method further includes a step of depositing a ball limiting metallurgy or under bump metallurgy in the plurality of discrete trenches to form discrete metal islands in contact with the upper wring layer. A solder bump is formed in electrical connection to the plurality of the discrete metal islands. COPYRIGHT: (C)2010,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide a metal wiring structure for a uniform current density in a C4 ball. SOLUTION: A sub-pad assembly of a metal structure is arranged directly underneath a metal pad. The sub-pad assembly includes an upper level metal line structure that comes into contact with the metal pad and a set of metal vias that provide electrical connection between the upper level metal line structure and a lower level metal line structure arranged underneath of the upper level metal line structure. The reliability of a C4 ball is improved by using a metal pad structure having a set of integrated metal vias that are divided and distributed to promote an uniform current density distribution in the C4 ball. The areal density of the cross-sectional area of the plurality of metal vias is higher at the center part of the metal pad than at the peripheral edge part of the flat part of the metal pad. COPYRIGHT: (C)2011,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide a method of forming a wire bond in an I/C chip. SOLUTION: This method comprises steps of: providing an I/C chip having a conductive pad for wire bonding and at least one dielectric material layer on the pad; forming an opening penetrating the dielectric material layer to expose a part of said pad; forming at least a first conductive layer on the exposed surface of the pad and on the surface of the opening; forming a seed layer on the first conductive layer, applying photoresist onto the seed layer; exposing the photoresist to light and developing the light-exposed photoresist; exposing the surface of the seed layer surrounding the opening; removing the exposed seed layer; removing the photoresist material inside the opening to expose the seed layer; coating at least one second conductive material layer on the seed layer inside the opening; and removing the first conductive layer on the dielectric layer around the opening. The present invention includes the structure obtained by the above method. COPYRIGHT: (C)2005,JPO&NCIPI
Abstract:
PROBLEM TO BE SOLVED: To provide a structure of a control collapse chip connection (C4) and its manufacturing method, and particularly, a structure to improve reliability of lead-free C4 interconnection and its method. SOLUTION: The structure includes a ball limited metalization (BLM) layer and a solder ball of control collapse chip connection (C4) formed on the BLM layer. Moreover, the structure includes the final metal pad layer under the BLM layer and a cap layer under the final metal pad layer. Then the structure includes an air gap between the final metal pad layer and one of the BLM layer and cap layer under the C4 solder ball. COPYRIGHT: (C)2011,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide structures with improved solder bump connections and methods of fabricating such structures. SOLUTION: Structures with improved solder bump connections and methods of fabricating such structures are provided herein. The structure includes a via formed in a dielectric layer to expose a contact pad and a capture pad formed in the via and over the dielectric layer. The capture pad has openings over the dielectric layer to form segmented features. The solder bump is deposited on the capture pad and the openings over the dielectric layer. COPYRIGHT: (C)2010,JPO&INPIT
Abstract:
A method for forming preferably Pb-lead C4 connections or capture pads 37 with ball limiting metallization on an integrated circuit chip 30 by using a damascene process and preferably Cu metallization 32 in the chip 30 and in the ball limiting metallization for compatibility. In two one embodiment, the capture pad 52 is formed in the top insulating layer 51 and it also serves as the final level of metallization in the chip.
Abstract:
A system and method for eliminating undercut when forming a C4 solder bump for BLM (Ball Limiting Metallurgy) and improving the C4 pitch. In the process, a barrier layer metal stack (20') is deposited above a metal pad layer (19'). A top layer (22') of the barrier layer metals (e.g., Cu) is patterned by CMP with a bottom conductive layer (21 ') of the barrier metal stack (20') removed by etching. The diffusion barrier (40) and C4 solder bump (50) may be formed by electroless plating, in one embodiment, using a maskless technique, or by an electroplating techniques using a patterned mask. This allows the pitch of the C4 solder bumps to be reduced.
Abstract:
In a first aspect, a method comprises depositing a first metal containing layer (16) into a trench structure, which contacts a metalized area (12) of a semiconductor structure (10). The method further includes patterning at least one opening in a resist to the first metal containing layer (16). The opening should be in alignment with the trench structure. At least a pad metal containing layer (20) is formed within the at least one opening (preferably by electroplating processes). The resist (18) and the first metal layer (16) underlying the resist (18) are then etched (with the second metal layer (20) acting as a mask, in embodiments). The method includes flowing solder material (22) within the trench and on pad metal containing layer (20) after the etching process. The structure is a controlled collapse chip connection (C4) structure comprising at least one electroplated metal layer formed in a resist pattern to form at least one ball limiting metallurgical layer. The structure further includes an underlying metal layer devoid of undercuts.