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    5.
    发明专利
    未知

    公开(公告)号：DE69714644T2

    公开(公告)日：2003-05-28

    申请号：DE69714644

    申请日：1997-04-22

    Applicant: IBM

    Inventor： ALT PAUL MATTHEW ,  CHALCO PEDRO A ,  FURMAN BRUCE KENNETH ,  HORTON RAYMOND ROBERT ,  NARAYAN CHANDRASEKHAR ,  OWENS JR ,  WARREN KEVIN WILSON ,  WRIGHT STEVEN LORENZ

    IPC: G02F1/1343 ,  G02F1/13 ,  G02F1/1362 ,  G06F11/20 ,  G09F9/30 ,  G09G3/20 ,  G09G3/36 ,  G11C29/00

    Abstract: A matrix addressed display system designed so as to enable data line (22) repair by electronic mechanisms which is efficient and low in cost and thus increases yield. Such active data line (22) repair utilizes additional data driver (36) outputs, a defect map memory (48) in the TFT/LCD module and modification of the data stream to the data drivers (36) by additional circuits (42) between the display and the display adapter. A bus configuration on the display substrate is utilized which combines repair flexibility, low parasitic capacitance, and the ability to easily make the necessary interconnections. The number of interconnections is kept to a minimum, the connections are reliable, and the connections may be made with conventional wire bond or laser bond technology, or disk bond technology.

    6.
    发明专利
    未知

    公开(公告)号：DE69714644D1

    公开(公告)日：2002-09-19

    申请号：DE69714644

    申请日：1997-04-22

    Applicant: IBM

    Inventor： ALT PAUL MATTHEW ,  CHALCO PEDRO A ,  FURMAN BRUCE KENNETH ,  HORTON RAYMOND ROBERT ,  NARAYAN CHANDRASEKHAR ,  OWENS JR ,  WARREN KEVIN WILSON ,  WRIGHT STEVEN LORENZ

    IPC: G02F1/1343 ,  G02F1/13 ,  G02F1/1362 ,  G06F11/20 ,  G09F9/30 ,  G09G3/20 ,  G09G3/36 ,  G11C29/00

    Abstract: A matrix addressed display system designed so as to enable data line (22) repair by electronic mechanisms which is efficient and low in cost and thus increases yield. Such active data line (22) repair utilizes additional data driver (36) outputs, a defect map memory (48) in the TFT/LCD module and modification of the data stream to the data drivers (36) by additional circuits (42) between the display and the display adapter. A bus configuration on the display substrate is utilized which combines repair flexibility, low parasitic capacitance, and the ability to easily make the necessary interconnections. The number of interconnections is kept to a minimum, the connections are reliable, and the connections may be made with conventional wire bond or laser bond technology, or disk bond technology.

    9.
    发明专利
    未知

    公开(公告)号：DE68926591T2

    公开(公告)日：1996-11-28

    申请号：DE68926591

    申请日：1989-03-06

    Applicant: IBM

    Inventor： BATEY JOHN ,  TIWARI SANDIP ,  WRIGHT STEVEN LORENZ

    IPC: H01L29/78 ,  H01L21/203 ,  H01L21/205 ,  H01L21/28 ,  H01L21/31 ,  H01L21/314 ,  H01L21/336 ,  H01L29/267 ,  H01L29/43 ,  H01L29/41

    Abstract: Unpinned metal-oxide-compound semiconductor structures are disclosed and a method of fabricating such structures is described. Epitaxial layers of compound semiconductor (14) are grown by MBE which results in the formation of a smooth surface having a stabilized reconstruction. An elemental semiconductor layer (16) is deposited epitaxially in situ with the compound semiconductor layer (14) which unpins the surface Fermi level. A layer of insulator material (18) is then deposited on the elemental semiconductor layer (16) by PECVD. In one embodiment, the compound semiconductor (14) is GaAs and the elemental semiconductor (16) is Si. The insulator material (18) is a layer of high quality SiO2. A metal gate (20) is deposited on the SiO2 layer (18) to form a MOS device (13). The epitaxial GaAs layer (14) has a density of states which permits the interface Fermi level to be moved through the entire forbidden energy gap. In another embodiment, the SiO2 deposition completely consumes the interface Si layer (16) so that the resulting MOS device comprises SiO2 (18) directly overlying the GaAs layer (14).

    10.
    发明专利
    未知

    公开(公告)号：DE68926591D1

    公开(公告)日：1996-07-11

    申请号：DE68926591

    申请日：1989-03-06

    Applicant: IBM

    Inventor： BATEY JOHN ,  TIWARI SANDIP ,  WRIGHT STEVEN LORENZ

    IPC: H01L29/78 ,  H01L21/203 ,  H01L21/205 ,  H01L21/28 ,  H01L21/31 ,  H01L21/314 ,  H01L21/336 ,  H01L29/267 ,  H01L29/43 ,  H01L29/41

    Abstract: Unpinned metal-oxide-compound semiconductor structures are disclosed and a method of fabricating such structures is described. Epitaxial layers of compound semiconductor (14) are grown by MBE which results in the formation of a smooth surface having a stabilized reconstruction. An elemental semiconductor layer (16) is deposited epitaxially in situ with the compound semiconductor layer (14) which unpins the surface Fermi level. A layer of insulator material (18) is then deposited on the elemental semiconductor layer (16) by PECVD. In one embodiment, the compound semiconductor (14) is GaAs and the elemental semiconductor (16) is Si. The insulator material (18) is a layer of high quality SiO2. A metal gate (20) is deposited on the SiO2 layer (18) to form a MOS device (13). The epitaxial GaAs layer (14) has a density of states which permits the interface Fermi level to be moved through the entire forbidden energy gap. In another embodiment, the SiO2 deposition completely consumes the interface Si layer (16) so that the resulting MOS device comprises SiO2 (18) directly overlying the GaAs layer (14).

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