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公开(公告)号:DE68908219D1
公开(公告)日:1993-09-16
申请号:DE68908219
申请日:1989-02-25
Applicant: IBM
Inventor: BATEY JOHN , JOSHI RAILY V
IPC: H01L29/78 , H01L21/336 , H01L29/45 , H01L29/786
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公开(公告)号:CA1308818C
公开(公告)日:1992-10-13
申请号:CA597294
申请日:1989-04-20
Applicant: IBM
Inventor: BATEY JOHN , TIWARI SANDIP , WRIGHT STEVEN L
IPC: H01L29/78 , H01L21/203 , H01L21/205 , H01L21/28 , H01L21/31 , H01L21/314 , H01L21/336 , H01L29/267 , H01L29/43 , H01L29/60
Abstract: UNPINNED OXIDE-COMPOUND SEMICONDUCTOR STRUCTURES AND METHOD OF FORMING SAME Unpinned epitaxial metal-oxide-compound semiconductor structures are disclosed and a method of fabricating such structures is described. Epitaxial layers of compound semiconductor are grown by MBE which result in the formation of a smooth surface having a stabilized reconstruction. An elemental semiconductor layer is deposited epitaxially in situ with the compound semiconductor layer which unpins the surface Fermi level. A layer of insulator material is then deposited on the elemental semiconductor layer by PECVD. In one embodiment, the compound semiconductor is GaAs and the elemental semiconductor is Si. The insulator material is a layer of high quality SiO2. A metal gate is deposited on the SiO2 layer to form an MOS device. The epitaxial GaAs layer has a density of states which permits the interface Fermi level to be moved through the entire forbidden energy gap. In another embodiment, the SiO2 deposition completely consumes the interface Si layer so that the resulting MOS device comprises SiO2 directly overlying the GaAs layer. Y0988-028
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公开(公告)号:DE69010308D1
公开(公告)日:1994-08-04
申请号:DE69010308
申请日:1990-09-03
Applicant: IBM
Inventor: BATEY JOHN , TIERNEY ELAINE
IPC: H01L21/316 , C23C16/40
Abstract: A method for depositing high quality silicon dioxide (26) in a plasma enhanced chemical vapor deposition tool is described. The reactant gases are introduced into the tool together with a large amount of an inert carrier gas. A plasma discharge is established in the tool by using a high RF power density thereby depositing high quality silicon dioxide (26) at very high deposition rates. In a single wafer tool, the RF power density is in the range of 1-4 W/cm and the deposition rate is from 60 - 150 nm (600-1500 angstroms) per minute for depositing high quality SiO2 films.
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公开(公告)号:DE68908219T2
公开(公告)日:1994-03-17
申请号:DE68908219
申请日:1989-02-25
Applicant: IBM
Inventor: BATEY JOHN , JOSHI RAILY V
IPC: H01L29/78 , H01L21/336 , H01L29/45 , H01L29/786
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公开(公告)号:DE69205241T2
公开(公告)日:1996-06-05
申请号:DE69205241
申请日:1992-07-16
Applicant: IBM
Inventor: BATEY JOHN , BOLAND JOHN , PARSONS GREGORY N
IPC: C23C16/24 , C23C16/04 , C23C16/44 , C23C16/455 , C23C16/50 , C23C16/515 , C23C16/52 , C30B25/16 , C30B29/06 , H01L21/20 , H01L21/205 , H01L21/00
Abstract: A substrate having silicon receptive surface areas is maintained in a plasma enhanced chemical vapor deposition (PECVD) chamber at a temperature, and under sufficient gas flow, pressure and applied energy conditions to form a gas plasma. The gas plasma is typically made up of hydrogen, but may also be made up of mixtures of hydrogen with other gasses. A discontinuous flow of silane gas of predetermined duration and predetermined time spacing is introduced to produce at least one timed pulse of silane gas containing plasma, whereby a thin layer of silicon is deposited on the receptive areas of the substrate. The thin layer of silicon is exposed to the hydrogen gas plasma between the brief deposition time cycles and may result in the modification of the silicon layer by the hydrogen plasma. The surface modification may include at least one of etching, surface hydrogenation, surface bond reconstruction, bond strain relaxation, and crystallization, and serves the purpose of improving the silicon film for use in, for example, electronic devices. Repeated time pulses of silane gas and subsequent hydrogen plasma exposure cycles can result in selective deposition of silicon on predetermined receptive areas of a patterned substrate. Selective deposition of silicon can serve the purpose of simplifying electronic device manufacturing, such as, for example, the fabrication of amorphous silicon thin film transistors with low contact resistance in a single PECVD pump-down procedure.
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公开(公告)号:DE68926591T2
公开(公告)日:1996-11-28
申请号:DE68926591
申请日:1989-03-06
Applicant: IBM
Inventor: BATEY JOHN , TIWARI SANDIP , WRIGHT STEVEN LORENZ
IPC: H01L29/78 , H01L21/203 , H01L21/205 , H01L21/28 , H01L21/31 , H01L21/314 , H01L21/336 , H01L29/267 , H01L29/43 , H01L29/41
Abstract: Unpinned metal-oxide-compound semiconductor structures are disclosed and a method of fabricating such structures is described. Epitaxial layers of compound semiconductor (14) are grown by MBE which results in the formation of a smooth surface having a stabilized reconstruction. An elemental semiconductor layer (16) is deposited epitaxially in situ with the compound semiconductor layer (14) which unpins the surface Fermi level. A layer of insulator material (18) is then deposited on the elemental semiconductor layer (16) by PECVD. In one embodiment, the compound semiconductor (14) is GaAs and the elemental semiconductor (16) is Si. The insulator material (18) is a layer of high quality SiO2. A metal gate (20) is deposited on the SiO2 layer (18) to form a MOS device (13). The epitaxial GaAs layer (14) has a density of states which permits the interface Fermi level to be moved through the entire forbidden energy gap. In another embodiment, the SiO2 deposition completely consumes the interface Si layer (16) so that the resulting MOS device comprises SiO2 (18) directly overlying the GaAs layer (14).
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公开(公告)号:DE68926591D1
公开(公告)日:1996-07-11
申请号:DE68926591
申请日:1989-03-06
Applicant: IBM
Inventor: BATEY JOHN , TIWARI SANDIP , WRIGHT STEVEN LORENZ
IPC: H01L29/78 , H01L21/203 , H01L21/205 , H01L21/28 , H01L21/31 , H01L21/314 , H01L21/336 , H01L29/267 , H01L29/43 , H01L29/41
Abstract: Unpinned metal-oxide-compound semiconductor structures are disclosed and a method of fabricating such structures is described. Epitaxial layers of compound semiconductor (14) are grown by MBE which results in the formation of a smooth surface having a stabilized reconstruction. An elemental semiconductor layer (16) is deposited epitaxially in situ with the compound semiconductor layer (14) which unpins the surface Fermi level. A layer of insulator material (18) is then deposited on the elemental semiconductor layer (16) by PECVD. In one embodiment, the compound semiconductor (14) is GaAs and the elemental semiconductor (16) is Si. The insulator material (18) is a layer of high quality SiO2. A metal gate (20) is deposited on the SiO2 layer (18) to form a MOS device (13). The epitaxial GaAs layer (14) has a density of states which permits the interface Fermi level to be moved through the entire forbidden energy gap. In another embodiment, the SiO2 deposition completely consumes the interface Si layer (16) so that the resulting MOS device comprises SiO2 (18) directly overlying the GaAs layer (14).
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公开(公告)号:DE69205241D1
公开(公告)日:1995-11-09
申请号:DE69205241
申请日:1992-07-16
Applicant: IBM
Inventor: BATEY JOHN , BOLAND JOHN , PARSONS GREGORY N
IPC: C23C16/24 , C23C16/04 , C23C16/44 , C23C16/455 , C23C16/50 , C23C16/515 , C23C16/52 , C30B25/16 , C30B29/06 , H01L21/20 , H01L21/205 , H01L21/00
Abstract: A substrate having silicon receptive surface areas is maintained in a plasma enhanced chemical vapor deposition (PECVD) chamber at a temperature, and under sufficient gas flow, pressure and applied energy conditions to form a gas plasma. The gas plasma is typically made up of hydrogen, but may also be made up of mixtures of hydrogen with other gasses. A discontinuous flow of silane gas of predetermined duration and predetermined time spacing is introduced to produce at least one timed pulse of silane gas containing plasma, whereby a thin layer of silicon is deposited on the receptive areas of the substrate. The thin layer of silicon is exposed to the hydrogen gas plasma between the brief deposition time cycles and may result in the modification of the silicon layer by the hydrogen plasma. The surface modification may include at least one of etching, surface hydrogenation, surface bond reconstruction, bond strain relaxation, and crystallization, and serves the purpose of improving the silicon film for use in, for example, electronic devices. Repeated time pulses of silane gas and subsequent hydrogen plasma exposure cycles can result in selective deposition of silicon on predetermined receptive areas of a patterned substrate. Selective deposition of silicon can serve the purpose of simplifying electronic device manufacturing, such as, for example, the fabrication of amorphous silicon thin film transistors with low contact resistance in a single PECVD pump-down procedure.
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公开(公告)号:DE69010308T2
公开(公告)日:1995-01-26
申请号:DE69010308
申请日:1990-09-03
Applicant: IBM
Inventor: BATEY JOHN , TIERNEY ELAINE
IPC: H01L21/316 , C23C16/40
Abstract: A method for depositing high quality silicon dioxide (26) in a plasma enhanced chemical vapor deposition tool is described. The reactant gases are introduced into the tool together with a large amount of an inert carrier gas. A plasma discharge is established in the tool by using a high RF power density thereby depositing high quality silicon dioxide (26) at very high deposition rates. In a single wafer tool, the RF power density is in the range of 1-4 W/cm and the deposition rate is from 60 - 150 nm (600-1500 angstroms) per minute for depositing high quality SiO2 films.
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