-
Patent Agency Ranking
公开(公告)号：AU630225B2
公开(公告)日：1992-10-22
申请号：AU6131590
申请日：1990-08-24
Applicant: IBM
Inventor： SCHEITTLER HELMUT , SCHULZ UWE , ZUHLKE RAINER
Abstract: A system design for VLSI chips (1,2) arranged on a carrier (3) and the module thus designed is described. In a top-down design system synoptically and simultaneously an electrical circuitry is optimized by designing synoptically the chips and the chip carrier. The overall logic is divided in partitions which fit on chips. A chip placement on the carrier is performed considering minimum overall connection length and providing preferably parallel connection. Input/Output contacts (121 to 221, 131 to 231, 141 to 241) are assigned on chips vis-a-vis each other when they correspond. They are connected by parallel lines. The design of the several chips is done from outside to inside, starting with the assigned I/O contacts. Overall, in combining optimum overall design and optimum chip design, a semiconductor thin film silicon multichip module of high yield and performance is provided. As carrier (3) that is included in the design from the beginning, preferably a thin film passive silicon carrier is used.
-
公开(公告)号：BR8705233A
公开(公告)日：1988-05-24
申请号：BR8705233
申请日：1987-10-02
Applicant: IBM
Inventor： LUDWIG THOMAS , SCHETTLER HELMUT , WAGNER OTTO , ZUHLKE RAINER
Abstract: A method for the digital slope control of the output signals of power amplifiers, as well as a power amplifier suitable for carrying out the method as described. One way of representing the actual slope value is via the number of clock pulses applied to a counter during a measuring interval which depends in its duration on the slope. Such a measuring interval is produced by applying the pulses of a ring oscillator containing one of the power amplifiers to another counter until the overflow of the latter. Another mode of representing the actual slope value consists in counting the number of pulses of the ring oscillator during a measuring interval of predetermined duration. Actual and nominal values of the slope are compared. The results of this comparison change the contents of a left/right-shift register. Its parallel outputs influence, via control lines, control inputs of the power amplifiers in order to alter their slope by switching on or off output transistors arranged in parallel with respect to their switching paths.
-
公开(公告)号：MY130151A
公开(公告)日：2007-06-29
申请号：MYPI9001368
申请日：1990-08-15
Applicant: IBM
Inventor： SCHETTLER HELMUT , SCHULZ UWE , ZUHLKE RAINER
IPC: H01L23/538 , H01L23/14
Abstract: A SYSTEM DESIGN FOR VLSI CHIPS ARRANGED ON A CARRIER AND THE MODULE THUS DESIGNED IS DESCRIBED. IN A TOP-DOWN DESIGN SYSTEM SYNOPTICALLY AND SIMULTANEOUSLY AN ELECTRICAL CIRCUITRY IS OPTIMIZED BY DESIGNING SYNOPTICALLY THE CHIPS AND THE CHIP CARRIER. THE OVERALL LOGIC IS DIVIDED IN PARTITIONS WHICH FIT ON CHIPS. A CHIP PLACEMENT ON THE CARRIER IS PERFORMED CONSIDERING MINIMUM OVERALL CONNECTION LENGTH AND PROVIDING PREFERABLY PARALLEL CONNECTION. INPUT/OUTPUT CONTACTS ARE ASSIGNED ON CHIPS VIS-A-VIS EACH OTHER WHEN THEY CORRESPOND. THEY ARE CONNECTED BY PARALLEL LINES. THE DESIGN OF THE SEVERAL CHIPS IS DONE FROM OUTSIDE TO INSIDE, STARTING WITH THE ASSIGNED I/O CONTACTS. OVERALL, IN COMBINING OPTIMUM OVERALL DESIGN AND OPTIMUM CHIP DESIGN, A SEMICONDUCTOR THIN FILM SILICON MULTICHIP MODULE OF HIGH YIELD AND PERFORMANCE IS PROVIDED. AS CARRIER THAT IS INCLUDED IN THE DESIGN FROM THE BEGINNING, PREFERABLY A THIN FILM PASSIVE SILICON CARRIER IS USED.(FIG 6)
-
公开(公告)号：AU6131590A
公开(公告)日：1991-03-21
申请号：AU6131590
申请日：1990-08-24
Applicant: IBM
Inventor： SCHEITTLER HELMUT , SCHULZ UWE , ZUHLKE RAINER
Abstract: A system design for VLSI chips (1,2) arranged on a carrier (3) and the module thus designed is described. In a top-down design system synoptically and simultaneously an electrical circuitry is optimized by designing synoptically the chips and the chip carrier. The overall logic is divided in partitions which fit on chips. A chip placement on the carrier is performed considering minimum overall connection length and providing preferably parallel connection. Input/Output contacts (121 to 221, 131 to 231, 141 to 241) are assigned on chips vis-a-vis each other when they correspond. They are connected by parallel lines. The design of the several chips is done from outside to inside, starting with the assigned I/O contacts. Overall, in combining optimum overall design and optimum chip design, a semiconductor thin film silicon multichip module of high yield and performance is provided. As carrier (3) that is included in the design from the beginning, preferably a thin film passive silicon carrier is used.
-
公开(公告)号：CA1261011A
公开(公告)日：1989-09-26
申请号：CA548403
申请日：1987-10-01
Applicant: IBM
Inventor： LUDWIG THOMAS , SCHETTLER HELMUT , WAGNER OTTO , ZUHLKE RAINER
Abstract: METHOD FOR THE DIGITAL SLOPE CONTROL OF THE OUTPUT SIGNALS OF POWER AMPLIFIERS OF SEMICONDUCTOR CHIPS WITH VLSI CIRCUITS FOR A COMPUTER A method for the digital slope control of the output signals of power amplifiers, as well as a power amplifier suitable for carrying out the method are described. One way of representing the actual slope value is via the number of clock pulses applied to a counter (10) during a measuring interval which depends in its duration on the slope. Such a measuring interval is produced by applying the pulses of a ring oscillator (1) containing one of the power amplifiers (2) to another counter (9) until the overflow of the latter. Another mode of representing the actual slope value consists in counting the number of pulses of the ring oscillator (1) during a measuring interval of predetermined duration. Actual and nominal values of the slope are compared. The results of this comparison change the contents of a left/right-shift register (19). Its parallel outputs (21) influence via control line (22) control inputs (23) of the power amplifiers in order to alter their slope by switching on or off output transistors arranged in parallel with respect to their switching paths.
-
-
-
-
Search Results
5
records
(took 0.017 seconds)
