公开(公告)号：DE60117676T2

公开(公告)日：2006-11-16

申请号：DE60117676

申请日：2001-12-27

Applicant: ST MICROELECTRONICS SRL

Inventor： NAVONI LORIS GIUSEPPE ,  BORGATTI MICHELE ,  CALI LORENZO ,  ROLANDI PIERLUIGI

IPC: G06F9/445 ,  G06F8/61

Abstract: The invention relates to a method of expanding the functional capabilities of portable electronic devices with user friendly modes, wherein a host device is associated a quick-connect function-expanding module. In this method, at each installation of a given module, the functional expansion module and the host device recognize each other; on first installation of a given module in the host device, a series of checking operations are carried out automatically; the user can select to activate the available expansion; and once a given application is selected, the configuration and functions required for each application are stored.

公开(公告)号：ITMI991618D0

公开(公告)日：1999-07-22

申请号：ITMI991618

申请日：1999-07-22

Applicant: ST MICROELECTRONICS SRL

Inventor： DOZZA DAVIDE ,  CANEGALLO ROBERTO ,  BORGATTI MICHELE

IPC: G11C16/08 ,  G11C16/10 ,  G11C16/14 ,  G11C16/24 ,  G11C16/26 ,  G11C16/30

Abstract: A non-volatile memory device organized with memory cells arranged by rows and columns in a matrix structure comprising source lines for memory cell groups. A switch is set between at least two rows or columns or source lines, which has two no pilotable terminals connected respectively to each one of the two rows or columns or source lines and a pilotable terminal connected to a logic circuitry. The switch allows a precharge of one of the two rows or columns or source lines by capacitive means associated to a each one of the two rows or columns or source lines after the other of the two rows or columns or source lines is connected to a higher voltage than that of said one of the two rows or columns or source lines.

公开(公告)号：DE602005008401D1

公开(公告)日：2008-09-04

申请号：DE602005008401

申请日：2005-05-27

Applicant: ST MICROELECTRONICS SRL

Inventor： GAJO FLAVIO ,  SFORZA FRANCESCO ,  STUCCHI STEFANIA ,  NAVONI LORIS GIUSEPPE ,  BORGATTI MICHELE

IPC: G06F13/38 ,  G06K19/073

Abstract: Protocol-based communication between a host device (10), such as e.g. an MP3 player, a digital camera, a palmtop, and so on, and an interface such as e.g. a flash mass storage card, is established automatically by: - providing, in the interface (12), a plurality of protocol-supporting facilities (16a, 16b, ..., 16n), each facility supporting communication with the host device (10) based on a respective protocol, - sending from the host device (10) towards the interface (12) a query message (200) specifying at least one protocol for use in protocol-based communication, - searching, within the plurality of protocol-supporting facilities (16a, 16b, ..., 16n) provided in the interface (12) one protocol-supporting facility supporting the protocol proposed in the query message (200), and - if such protocol-supporting facility is found within the plurality of protocol-supporting facilities (16a, 16b, ..., 16n) provided in the interface (12), setting up the protocol-based communication between the host device (10) and the interface (12) based on the protocol proposed in the query message (200) issued from the host device (10).

公开(公告)号：DE60117676D1

公开(公告)日：2006-05-04

申请号：DE60117676

申请日：2001-12-27

Applicant: ST MICROELECTRONICS SRL

Inventor： NAVONI LORIS GIUSEPPE ,  BORGATTI MICHELE ,  CALI LORENZO ,  ROLANDI PIERLUIGI

IPC: G06F9/445 ,  G06F8/61

Abstract: The invention relates to a method of expanding the functional capabilities of portable electronic devices with user friendly modes, wherein a host device is associated a quick-connect function-expanding module. In this method, at each installation of a given module, the functional expansion module and the host device recognize each other; on first installation of a given module in the host device, a series of checking operations are carried out automatically; the user can select to activate the available expansion; and once a given application is selected, the configuration and functions required for each application are stored.

公开(公告)号：DE602005009801D1

公开(公告)日：2008-10-30

申请号：DE602005009801

申请日：2005-04-11

Applicant: ST MICROELECTRONICS SRL

Inventor： LERTORA FRANCESCO ,  BORGATTI MICHELE

IPC: G06F15/78 ,  G06F17/50 ,  H04L12/56

Abstract: A system-on-chip arrangement includes, in possible combination with a processor (100): - a plurality of reconfigurable gate array devices (1001, 1002, 1003), and - a configurable Network-on-Chip (1004) connecting the gate-array devices (1001, 1002, 1003) to render the arrangement scalable. The arrangement lends itself to be operated by: - mapping in one device of the plurality (1001, 1002, 1003) a set of processing modules, and - configuring another device of the plurality (1001, 1002, 1003) as a microcontroller having stored therein software code portions for controlling inter-operation of the processing modules stored in the one device of the plurality (1001, 1002, 1003). The arrangement is thus adapted e.g. to handle different computational granularity levels.

公开(公告)号：DE60317457D1

公开(公告)日：2007-12-27

申请号：DE60317457

申请日：2003-01-31

Applicant: ST MICROELECTRONICS SRL

Inventor： PASOTTI MARCO ,  BORGATTI MICHELE ,  ROLANDI PIER LUIGI

IPC: G11C5/14 ,  G06F12/00 ,  G11C16/30

Abstract: The present invention relates to a 8Mb application-specific embeddable flash memory. It comprises three content-specific I/O ports and delivers a peak read throughput of 1.2GB/s. The memory is combined with a special automatic programming gate voltage ramp generator circuit, a programming rate of 1 Mbyte/s for non-volatile storage of code, data and embedded FPGA bit stream configurations. The test chip has been designed using a NOR type 0.18 mu m flash embedded technology with 1.8V power supply, two poly, six metal and memory cell size of 0.35 mu m .

公开(公告)号：IT1313199B1

公开(公告)日：2002-06-17

申请号：ITMI991618

申请日：1999-07-22

Applicant: ST MICROELECTRONICS SRL

Inventor： DOZZA DAVIDE ,  CANEGALLO ROBERTO ,  BORGATTI MICHELE

IPC: G11C16/08 ,  G11C16/10 ,  G11C16/14 ,  G11C16/24 ,  G11C16/26 ,  G11C16/30

Abstract: A non-volatile memory device organized with memory cells arranged by rows and columns in a matrix structure comprising source lines for memory cell groups. A switch is set between at least two rows or columns or source lines, which has two no pilotable terminals connected respectively to each one of the two rows or columns or source lines and a pilotable terminal connected to a logic circuitry. The switch allows a precharge of one of the two rows or columns or source lines by capacitive means associated to a each one of the two rows or columns or source lines after the other of the two rows or columns or source lines is connected to a higher voltage than that of said one of the two rows or columns or source lines.

公开(公告)号：ITMI991618A1

公开(公告)日：2001-01-22

申请号：ITMI991618

申请日：1999-07-22

Applicant: ST MICROELECTRONICS SRL

Inventor： DOZZA DAVIDE ,  CANEGALLO ROBERTO ,  BORGATTI MICHELE

IPC: G11C16/08 ,  G11C16/10 ,  G11C16/14 ,  G11C16/24 ,  G11C16/26 ,  G11C16/30

Abstract: A non-volatile memory device organized with memory cells arranged by rows and columns in a matrix structure comprising source lines for memory cell groups. A switch is set between at least two rows or columns or source lines, which has two no pilotable terminals connected respectively to each one of the two rows or columns or source lines and a pilotable terminal connected to a logic circuitry. The switch allows a precharge of one of the two rows or columns or source lines by capacitive means associated to a each one of the two rows or columns or source lines after the other of the two rows or columns or source lines is connected to a higher voltage than that of said one of the two rows or columns or source lines.