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    A circuit structure of the feedforward type with programmable zeroes, particularly for synthesizing time-continual filters
    3.
    发明公开
    A circuit structure of the feedforward type with programmable zeroes, particularly for synthesizing time-continual filters 有权
    正向电路结构具有可编程零用于合成连续时间滤波器

    公开(公告)号：EP1146639A3

    公开(公告)日：2003-04-16

    申请号：EP01100814.1

    申请日：2001-01-15

    Applicant: STMicroelectronics S.r.l.

    Inventor： Pisati, Valerio ,  Portaluri, Salvatore ,  Cazzaniga, Marco ,  Castello, Rinaldo

    IPC: H03H11/04

    CPC classification number: H03H11/0422

    Abstract: This invention relates to a circuit structure of the feedforward type with programmable zeroes, particularly for synthesizing time-continual filters. This structure comprises a pair of amplification cells (14,15) interconnected at at least one interconnection node (A) and connected between a first signal (Vin) input (IN) of a first cell (14) and an output terminal (U) of the second cell (15, each cell (14,15) comprising a pair of transistors (10,2;6,7) which have a conduction terminal in common and have the other conduction terminals coupled respectively to a first voltage reference (Vcc) through respective bias members (3,4;9,11). The structure further comprises a circuit leg (13) connecting a node (X) of the first cell (14) to the output terminal (U) and comprising a transistor (8) which has a control terminal connected to the node (X) of the first cell (14), a first conduction terminal connected to the output terminal (U), and a second conduction terminal coupled to a second voltage reference (GND) through a capacitor (Cc). Thus, a released "zero" can be introduced in the right semiplane of the pole-zero complex plane to improve the flattening of group gain.

    Method and circuit for testing the presence of multiple supply voltages in an integrated circuit
    4.
    发明公开
    Method and circuit for testing the presence of multiple supply voltages in an integrated circuit 有权
    的方法和电路，用于测试在集成电路的多个电源电压的存在

    公开(公告)号：EP1083436A1

    公开(公告)日：2001-03-14

    申请号：EP99830559.3

    申请日：1999-09-08

    Applicant: STMicroelectronics S.r.l.

    Inventor： Garbelli, Luigi Eugenio ,  Luciano, Guiseppe ,  Portaluri, Salvatore

    IPC: G01R31/40

    CPC classification number: G01R31/40 ,  G05F1/468

    Abstract: The monitoring of multiple supply voltages of an IC, part of which are externally provided and part of which, of different voltage and sign, are internally generated (12V, 5V, 3.3V, 2.5V, -5V), consisting in generating a logic signal (NPOR) monitoring the correctness of all said supply voltages after an initial soft start phase of the turn-on process, is done by using a single external capacitor (C) connected to a pin of the integrated circuit.

    Abstract translation: 的IC的多个电源电压，其中一部分的不同的电压和标志的是外部提供的并且其的一部分，所述的监测，在内部产生（12V，5V，3.3V，2.5V，5V）在产生逻辑由......组成 信号（NPOR）监控所有所述电源电压的正确性在导通过程的初始软启动阶段之后，通过使用连接到集成电路的引脚的单个外部电容器（C）进行。

    Read channel equalization with enhanced signal to noise ratio
    5.
    发明公开
    Read channel equalization with enhanced signal to noise ratio 失效
    Entzerrung eines Lesekanals mit verbicultem Signal-Rausch-Verhältnis

    公开(公告)号：EP0961269A1

    公开(公告)日：1999-12-01

    申请号：EP98830259.2

    申请日：1998-04-29

    Applicant: STMicroelectronics S.r.l.

    Inventor： Bollati, Giacomino ,  Bruccoleri, Melchiorre ,  Portaluri, Salvatore ,  Celant, Luca

    IPC: G11B20/00 ,  G11B20/10 ,  G11B5/09

    CPC classification number: G11B20/10046 ,  G11B2220/2516

    Abstract: A method of equalizing a read channel of a mass memory device on a magnetic support, comprises attenuating the low frequencies of the spectrum of the analog signal originating from an electromagnetic read transducer without boosting the high frequency harmonic components of the spectrum. The low frequencies of the spectrum of the analog input signal are attenuated with a low pass filter of an order comprised between 6 and 8 and a boost is implemented by introducing in the transfer function of the filter two real and opposed zeroes without altering the group delay.

    Abstract translation: 一种均衡磁性支架上的大容量存储器件的读取通道的方法包括衰减来自电磁读取换能器的模拟信号的频谱的低频，而不会增加频谱的高频谐波分量。 模拟输入信号的频谱的低频通过包含在6和8之间的阶数的低通滤波器衰减，并且通过在滤波器的传递函数中引入两个实数和相对的零来实现升压，而不改变组延迟 。

    Generator of pulses with programmable width
    7.
    发明公开
    Generator of pulses with programmable width 失效
    发电机von Pulsen mit programmierbarer Dauer

    公开(公告)号：EP0948135A1

    公开(公告)日：1999-10-06

    申请号：EP98830191.7

    申请日：1998-03-31

    Applicant: STMicroelectronics S.r.l.

    Inventor： Portaluri, Salvatore ,  Pisati, Valerio ,  Zangrandi, Luigi

    IPC: H03K7/08

    CPC classification number: H03K7/08

    Abstract: A device for generating pulses of high-precision programmable duration, whose particularity is the fact that it comprises:

    -- first pulse generator means (1) which are suitable to receive in input a pulse generation command signal (IN) and to emit in output a first pulse for loading the contents of a register in counter means (2);
    -- second pulse generator means (4), triggered by the first pulse in output from the first pulse generator means (1);
    -- third pulse generator means (6), triggered by a second pulse emitted by the second pulse generator means and suitable to generate a third pulse to restart the second pulse generator means;
    the second pulse emitted by the second pulse generator means (4) constituting a clock signal for the counter means (2) in order to produce a decrement in the counter means; the signal in output from the counter means (2) being the pulsed signal to be generated (OUT); the duration of the pulsed signal being determined by the content of the counter means (2).

    Abstract translation: 一种用于产生高精度可编程持续时间的脉冲的装置，其特点在于其包括： - 第一脉冲发生器装置（1），其适于在输入端接收脉冲发生命令信号（IN）并发射输出 用于在计数器装置（2）中加载寄存器的内容的第一脉冲; - 第二脉冲发生器装置（4），由第一脉冲发生器装置（1）输出的第一脉冲触发; - 第三脉冲发生器装置（6），由第二脉冲发生器装置发射的第二脉冲触发并适于产生第三脉冲以重启第二脉冲发生器装置; 由第二脉冲发生器装置发出的第二脉冲构成计数器装置（2）的时钟信号，以产生计数器装置的减量; 来自计数器装置（2）的输出中的信号是要产生的脉冲信号（OUT）; 脉冲信号的持续时间由计数器装置（2）的内容确定。

    Amplifier with programmable gain and input linearity usable in high-frequency lines
    8.
    发明公开
    Amplifier with programmable gain and input linearity usable in high-frequency lines 失效
    具有可编程的增益和输入线性高频放大器线

    公开(公告)号：EP0948132A1

    公开(公告)日：1999-10-06

    申请号：EP98830192.5

    申请日：1998-03-31

    Applicant: STMicroelectronics S.r.l.

    Inventor： Marchese, Stafano ,  Pisati, Valerio ,  Portaluri, Salvatore ,  Savo, Alessandro

    IPC: H03G3/00 ,  H03G1/00 ,  H03G7/00

    CPC classification number: H03G7/06 ,  H03G1/0023

    Abstract: An amplifier with programmable gain and input linearity, comprising an input stage (10), which is suitable to receive a voltage signal (V + , V - ) and perform current conversion thereof with compression, and an output stage (30), which is connected to the input stage (10) and is suitable to decompress the signal in output from the input stage, producing gain amplification thereof; the particularity of the amplifier is the fact that it further comprises at least one current amplifier stage (20) which is interposed between the input stage (10) and the output stage (30) and comprises at least one bipolar transistor (21, 22) which is series-connected to a load diode (23, 24) and to a current source (2I 2 ); programmable means (I 2 , I 2 *) for reducing the transconductance of the load diode (23, 24) being provided in the at least one amplifier stage (20) to determine a programmable amplification factor for the gain of the amplifier.

    Abstract translation: 具有可编程的增益和输入线性放大器，所有这些是适合于接收包括输入级的电压信号（10），（V <+> V < - >），并用其压缩进行电流转换，并且到输出级（30 ），所有这些是连接到输入级（10）和适用于从输入级输出到解压缩信号，产生它们的增益放大; 放大器的特殊性是它还包括factthat该输入级（10）和输出级（30）之间并且包括至少一个双极性晶体管（21，22）的至少一个电流放大器级（20）的所有 所有这一切都被串联连接到负载二极管（23，24）和电流源（2I2）; 可编程装置（I2，I2 *）用于减小负载二极管（23，24）在所述至少一个放大级（20）设置的跨导到确定性矿可编程放大因子用于放大器的增益。

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