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1.发明申请FLASH MEMORIES USING MINIMUM PUSH UP, MULTI-CELL AND MULTI-PERMUTATION SCHEMES FOR DATA STORAGE 有权使用最小推送，数据存储的多细胞和多变数方案的闪存记忆公开(公告)号：US20130268723A1
公开(公告)日：2013-10-10
申请号：US13791856
申请日：2013-03-08
Inventor： Anxiao Jiang , Eyal En Gad , Jehoshua Bruck
CPC classification number: G11C16/0441 , G06F3/0619 , G06F3/0643 , G06F3/0679 , G06F12/0246 , G11C11/5621 , G11C11/5628 , G11C11/5635 , G11C16/0483 , H03M1/14 , H03M2201/52
Abstract: Rank modulation has been recently proposed as a scheme for storing information in flash memories. Three improved aspects are disclosed. In one aspect the minimum push-up scheme, for storing data in flash memories is provided. It aims at minimizing the cost of changing the state of the memory. In another aspect, multi-cells, used for storing data in flash memories is provided. Each transistor is replaced with a multi-cell of mm transistors connected in parallel. In yet another aspect, multi-permutations, are provided. The paradigm of representing information with permutations is generalized to the case where the number of cells in each level is a constant greater than one.
Abstract translation: 近来已经提出了等级调制作为用于将信息存储在闪速存储器中的方案。 公开了三个改进的方面。 在一个方面，提供了用于将数据存储在闪速存储器中的最小上推方案。 它旨在最大限度地减少改变记忆状态的成本。 在另一方面，提供了用于将数据存储在闪存中的多单元。 每个晶体管被并联连接的mm晶体管的多单元电池代替。 在另一方面，提供了多重排列。 代表具有置换的信息的范例被推广到每个级别中的单元的数量是大于1的常数的情况。
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公开(公告)号：US3935569A
公开(公告)日：1976-01-27
申请号：US397924
申请日：1973-09-17
Applicant: Francois Marcel , Alain Manoury
Inventor： Francois Marcel , Alain Manoury
IPC: H03M1/14 , H03M1/00 , H03K13/175
CPC classification number: H03M1/00 , H03M2201/01 , H03M2201/14 , H03M2201/16 , H03M2201/196 , H03M2201/2208 , H03M2201/3115 , H03M2201/3131 , H03M2201/4105 , H03M2201/4135 , H03M2201/4204 , H03M2201/4225 , H03M2201/4233 , H03M2201/4262 , H03M2201/52 , H03M2201/522 , H03M2201/523 , H03M2201/534 , H03M2201/60 , H03M2201/6121
Abstract: The invention concerns a digital coder subject to a compression law having multiple linear segments with slopes decreasing in geometrical progression having a ratio of 1/2, in which a chain of threshold detectors in a linear progression is used a first time to determine the number of the segment, then a second time to determine the position of the level on the segment.
Abstract translation: 本发明涉及经受压缩规律的数字编码器，该数字编码器具有多个线性段，其斜率以1/2的比例在几何级数上减小，其中使用线性进程中的阈值检测器链第一次来确定 该段，然后第二次确定段上的水平位置。
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Patent Agency Ranking
3.发明授权公开(公告)号：US09666280B2
公开(公告)日：2017-05-30
申请号：US14822680
申请日：2015-08-10
Inventor： Anxiao Jiang , Eyal En Gad , Jehoshua Bruck
CPC classification number: G11C16/0441 , G06F3/0619 , G06F3/0643 , G06F3/0679 , G06F12/0246 , G11C11/5621 , G11C11/5628 , G11C11/5635 , G11C16/0483 , H03M1/14 , H03M2201/52
Abstract: Rank modulation has been recently proposed as a scheme for storing information in flash memories. Three improved aspects are disclosed. In one aspect the minimum push-up scheme, for storing data in flash memories is provided. It aims at minimizing the cost of changing the state of the memory. In another aspect, multi-cells, used for storing data in flash memories is provided. Each transistor is replaced with a multi-cell of m transistors connected in parallel. In yet another aspect, multi-permutations, are provided. The paradigm of representing information with permutations is generalized to the case where the number of cells in each level is a constant greater than one.
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4.发明申请FLASH MEMORIES USING MINIMUM PUSH UP, MULTI-CELL AND MULTI-PERMUTATION SCHEMES FOR DATA STORAGE 有权使用最小推送，数据存储的多细胞和多变数方案的闪存记忆公开(公告)号：US20160170684A1
公开(公告)日：2016-06-16
申请号：US14822680
申请日：2015-08-10
Inventor： Anxiao Jiang , Eyal En Gad , Jehoshua Bruck
IPC: G06F3/06
CPC classification number: G11C16/0441 , G06F3/0619 , G06F3/0643 , G06F3/0679 , G06F12/0246 , G11C11/5621 , G11C11/5628 , G11C11/5635 , G11C16/0483 , H03M1/14 , H03M2201/52
Abstract: Rank modulation has been recently proposed as a scheme for storing information in flash memories. Three improved aspects are disclosed. In one aspect the minimum push-up scheme, for storing data in flash memories is provided. It aims at minimizing the cost of changing the state of the memory. In another aspect, multi-cells, used for storing data in flash memories is provided. Each transistor is replaced with a multi-cell of m transistors connected in parallel. In yet another aspect, multi-permutations, are provided. The paradigm of representing information with permutations is generalized to the case where the number of cells in each level is a constant greater than one.
Abstract translation: 近来已经提出了等级调制作为用于将信息存储在闪速存储器中的方案。 公开了三个改进的方面。 在一个方面，提供了用于将数据存储在闪速存储器中的最小上推方案。 它旨在最大限度地减少改变记忆状态的成本。 在另一方面，提供了用于将数据存储在闪存中的多单元。 每个晶体管被并联连接的m个晶体管的多单元替代。 在另一方面，提供了多重排列。 代表具有置换的信息的范例被推广到每个级别中的单元的数量是大于1的常数的情况。
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5.发明授权Flash memories using minimum push up, multi-cell and multi-permutation schemes for data storage 有权闪存使用最小的上推，多单元和多排列方案进行数据存储公开(公告)号：US09230652B2
公开(公告)日：2016-01-05
申请号：US13791856
申请日：2013-03-08
Inventor： Anxiao Jiang , Eyal En Gad , Jehoshua Bruck
CPC classification number: G11C16/0441 , G06F3/0619 , G06F3/0643 , G06F3/0679 , G06F12/0246 , G11C11/5621 , G11C11/5628 , G11C11/5635 , G11C16/0483 , H03M1/14 , H03M2201/52
Abstract: Rank modulation has been recently proposed as a scheme for storing information in flash memories. Three improved aspects are disclosed. In one aspect the minimum push-up scheme, for storing data in flash memories is provided. It aims at minimizing the cost of changing the state of the memory. In another aspect, multi-cells, used for storing data in flash memories is provided. Each transistor is replaced with a multi-cell of mm transistors connected in parallel. In yet another aspect, multi-permutations, are provided. The paradigm of representing information with permutations is generalized to the case where the number of cells in each level is a constant greater than one.
Abstract translation: 近来已经提出了等级调制作为用于将信息存储在闪速存储器中的方案。 公开了三个改进的方面。 在一个方面，提供了用于将数据存储在闪速存储器中的最小上推方案。 它旨在最大限度地减少改变记忆状态的成本。 在另一方面，提供了用于将数据存储在闪存中的多单元。 每个晶体管被并联连接的mm晶体管的多单元电池代替。 在另一方面，提供了多重排列。 代表具有置换的信息的范例被推广到每个级别中的单元的数量是大于1的常数的情况。
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6.发明授权Transmitter for forming non-linear pulse code modulated samples of analog signals by timing the integral of signal samples 失效用于形成模拟信号的非线性脉冲代码调制样本的发送器通过定时信号样本的整合
公开(公告)号：US4010422A
公开(公告)日：1977-03-01
申请号：US409425
申请日：1973-10-25
Applicant: Kornelis Jan Wouda
Inventor： Kornelis Jan Wouda
CPC classification number: H04B14/04 , H03M1/00 , H04B14/048 , H03M2201/01 , H03M2201/14 , H03M2201/16 , H03M2201/196 , H03M2201/2344 , H03M2201/4105 , H03M2201/4135 , H03M2201/4204 , H03M2201/4212 , H03M2201/4225 , H03M2201/4233 , H03M2201/425 , H03M2201/4262 , H03M2201/52 , H03M2201/523 , H03M2201/534 , H03M2201/60 , H03M2201/6121 , H03M2201/712 , H03M2201/715 , H03M2201/8124
Abstract: A non-linear pulse code modulator wherein input signals are coded into digital representations of amplitude range segments and amplitude in excess of the minimum amplitude within the respective range segment uses a first analog-to-digital converter having a sawtooth-shaped control characteristic to determine the amplitude range segment from an input signal sample. The output of the first analog-to-digital converter is used to effectively divide the signal sample by a factor 2.sup.n, where n corresponds to the determined range. The result of the division is then converted in a second analog-to-digital conversion to a digital signal that is combined with the digital range segment signal for transmission thereof.
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公开(公告)号：KR1020080077795A
公开(公告)日：2008-08-26
申请号：KR1020070017444
申请日：2007-02-21
Applicant: 삼성전자주식회사
IPC: H03M1/12
CPC classification number: H03M1/361 , H03M1/002 , H03M1/368 , H03M2201/2208 , H03M2201/52
Abstract: An analog/digital converter using a multiplexer and a conversion method thereof are provided to convert an analog signal into binary codes without a process for conversion to 1-of-n codes by installing the multiplexer, having a simple structure, in an encoder. An analog/digital converter using a multiplexer includes a digital code generation unit(300) and a binary code generation unit(500). The digital code generation unit compares an analog input signal with reference voltages of each level, and then generates a plurality of digital codes. The binary code generation unit has a plurality of multiplexers corresponding to the number of the generated digital codes and generates binary codes by switching the digital codes by using the multiplexers.
Abstract translation: 提供了一种使用多路复用器的模/数转换器及其转换方法，用于将模拟信号转换为二进制码，而无需通过在编码器中安装具有简单结构的多路复用器将其转换为1-n码的处理。 使用复用器的模拟/数字转换器包括数字代码生成单元（300）和二进制代码生成单元（500）。 数字代码生成单元将模拟输入信号与各级的参考电压进行比较，然后生成多个数字代码。 二进制代码生成单元具有与生成的数字代码的数量对应的多个复用器，并且通过使用多路复用器切换数字代码来生成二进制代码。
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