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    SIGNAL CONVERTER AND METHOD FOR OPERATING A SIGNAL CONVERTER
    4.
    发明申请
    SIGNAL CONVERTER AND METHOD FOR OPERATING A SIGNAL CONVERTER 有权
    信号转换器和操作信号转换器的方法

    公开(公告)号：US20150048958A1

    公开(公告)日：2015-02-19

    申请号：US13968036

    申请日：2013-08-15

    Applicant: Infineon Technologies AG

    Inventor： Heimo Hartlieb ,  Clemens Kain ,  Michael Hausmann

    IPC: H03M1/34 ,  H03M1/00 ,  H03M1/12

    CPC classification number: H03M1/34 ,  H03M1/00 ,  H03M1/001 ,  H03M1/12 ,  H03M1/124 ,  H03M1/129 ,  H03M1/46 ,  H03M2201/4135

    Abstract: In accordance with an embodiment, a method for operating a signal converter includes converting an analog input signal to a digital output signal, comprising by comparing the analog input signal to an analog comparison signal, and detecting whether the analog input signal exceeds a predetermined maximum or minimum threshold by comparing the analog input signal to an analog threshold signal. The analog comparison signal and the analog threshold signal are generated by a same digital-to-analog converter.

    Abstract translation: 根据实施例，用于操作信号转换器的方法包括将模拟输入信号转换成数字输出信号，包括通过将模拟输入信号与模拟比较信号进行比较，以及检测模拟输入信号是否超过预定的最大值 通过将模拟输入信号与模拟阈值信号进行比较来获得最小阈值。 模拟比较信号和模拟阈值信号由相同的数模转换器产生。

    METHOD AND DEVICE FOR IMPROVING CONVERGENCE TIME IN CORRELATION-BASED ALGORITHMS
    5.
    发明申请
    METHOD AND DEVICE FOR IMPROVING CONVERGENCE TIME IN CORRELATION-BASED ALGORITHMS 有权
    用于提高基于相关算法的收敛时间的方法和装置

    公开(公告)号：US20140266844A1

    公开(公告)日：2014-09-18

    申请号：US13897604

    申请日：2013-05-20

    Applicant: Ahmed Mohamed Abdelatty ALI

    Inventor： Ahmed Mohamed Abdelatty ALI

    IPC: H03M1/10

    CPC classification number: H03M1/1071 ,  H03M1/00 ,  H03M1/0641 ,  H03M1/0695 ,  H03M1/1009 ,  H03M1/12 ,  H03M1/164 ,  H03M1/44 ,  H03M2201/4135

    Abstract: A method and a corresponding device reduce the convergence time of a correlation algorithm that uses random signals injected into an analog-to-digital converter (ADC) as input to the algorithm. The method and device involve, at a processor of a pipelined ADC, injecting a random signal into each of a plurality of stages in the pipeline and obtaining digital values generated in response to the random signals. Noise components of residue signals in the plurality of stages are calculated as a function of the digital values and values of the random signals. The noise components correspond to the random signals.

    Abstract translation: 一种方法和相应的器件减少了使用注入模数转换器（ADC）的随机信号作为算法输入的相关算法的收敛时间。 该方法和装置涉及在流水线式ADC的处理器处，将随机信号注入流水线中的多个级中的每一级，并获得响应于随机信号产生的数字值。 作为随机信号的数字值和值的函数计算多个级中的残留信号的噪声分量。 噪声分量对应于随机信号。

    Monolithic integrable R-2R network
    6.
    发明授权
    Monolithic integrable R-2R network 失效
    单片可积分R-2R网络

    公开(公告)号：US4381499A

    公开(公告)日：1983-04-26

    申请号：US318887

    申请日：1981-11-06

    Applicant: Holger Struthoff

    Inventor： Holger Struthoff

    IPC: H03M1/78 ,  H03M1/00 ,  H03K13/02

    CPC classification number: H03M1/00 ,  H03M2201/02 ,  H03M2201/3115 ,  H03M2201/3131 ,  H03M2201/3136 ,  H03M2201/3168 ,  H03M2201/4135 ,  H03M2201/4225 ,  H03M2201/4233 ,  H03M2201/4262 ,  H03M2201/814 ,  H03M2201/931

    Abstract: A monolithic integrable R-2R resistor network comprises a number of series resistors connected to a terminal resistor; and a plurality of 2R resistor units each capable of being switched by two electronic switches either to ground or to another reference point, a different plurality of 2R resistor units being coupled to the nodes between each of the series resistors, to the node between the terminal resistor and the last resistor of the series resistors and to the node ahead of the first resistor of the series resistors. To compensate for the effects of the variations of the switch resistances caused during manufacture by process parameter fluctuations upon the accuracy of a D/A converter, a switch structure is inserted at each of the nodes which, with respect to the two electronic switches, is of the same kind, and which is permanently in an electrically conducting state. Preferably, there are used insulated-gate field-effect transistors and insulated-gate field-effect transistor structures, the identical electrodes of which, for example, the source electrodes, are directly connected to each of the nodes.

    Abstract translation: 单片可积分R-2R电阻网络包括连接到端子电阻器的多个串联电阻器; 以及多个2R电阻单元，每个能够被两个电子开关切换到接地或另一个参考点，不同的多个2R电阻单元耦合到每个串联电阻之间的节点到端子之间的节点 电阻器和串联电阻器的最后一个电阻器，并连接到串联电阻器的第一个电阻器前面的节点。 为了补偿由于工艺参数波动而产生的开关电阻的变化对D / A转换器的精度的影响，在每个节点处插入开关结构，相对于两个电子开关 并且永久地处于导电状态。 优选地，使用绝缘栅场效应晶体管和绝缘栅场效应晶体管结构，其相同的电极例如源电极直接连接到每个节点。

    Temperature measurement system
    7.
    发明授权
    Temperature measurement system 有权
    温度测量系统

    公开(公告)号：US09488529B2

    公开(公告)日：2016-11-08

    申请号：US13904649

    申请日：2013-05-29

    Applicant: Intel IP Corporation

    Inventor： Merit Hong ,  David Harnishfeger ,  Kris Kaufman

    IPC: G01K7/00 ,  G01K7/16 ,  G01K7/22

    CPC classification number: G01K7/16 ,  G01K7/22 ,  H03M1/0617 ,  H03M2201/4135

    Abstract: A temperature measurement system is disclosed. In accordance with some embodiments of the present disclosure, a temperature measurement system may comprise a resistor, a thermistor, a resistance-to-current converter configured to generate a current signal based on a resistance, an analog-to-digital converter (ADC) configured to receive a first current signal based on the resistor, convert the first current signal into a first digital signal, receive a second current signal based on the thermistor, and convert the second current signal into a second digital signal, and a calculation stage communicatively coupled to an ADC output and configured to determine a first digital value based on the first digital signal, determine a second digital value based on the second digital signal, calculate a resistance ratio based on the first digital value and the second digital value, and determine a temperature output value based on the resistance ratio.

    Abstract translation: 公开了一种温度测量系统。 根据本公开的一些实施例，温度测量系统可以包括电阻器，热敏电阻器，被配置为基于电阻产生电流信号的电阻 - 电流转换器，模数转换器（ADC） 被配置为基于所述电阻器接收第一电流信号，将所述第一电流信号转换为第一数字信号，基于所述热敏电阻接收第二电流信号，并将所述第二电流信号转换为第二数字信号，以及计算阶段 耦合到ADC输出并且被配置为基于第一数字信号确定第一数字值，基于第二数字信号确定第二数字值，基于第一数字值和第二数字值计算电阻比，并且确定 基于电阻比的温度输出值。

    METHOD OF DYNAMIC ELEMENT MATCHING AND AN APPARATUS THEREOF
    8.
    发明申请
    METHOD OF DYNAMIC ELEMENT MATCHING AND AN APPARATUS THEREOF 有权
    动力元件匹配方法及其装置

    公开(公告)号：US20140176355A1

    公开(公告)日：2014-06-26

    申请号：US13906351

    申请日：2013-05-31

    Applicant: Wen-Hsien Chuang ,  Hsiang-Wei Liu ,  Jen-Wei Tsai ,  Ting-Hao Wang

    Inventor： Wen-Hsien Chuang ,  Hsiang-Wei Liu ,  Jen-Wei Tsai ,  Ting-Hao Wang

    IPC: H03M1/66

    CPC classification number: H03M1/0665 ,  G06F1/10 ,  H03L7/0814 ,  H03M1/00 ,  H03M1/747 ,  H03M2201/4135

    Abstract: A method to reduce the integral non-linearity (INL) of a digital-to-analog converter (DAC) and a DAC implementing said method are disclosed. The method in this invention is a pseudo dynamic element matching (PDEM) method. Compared with a prior art, the method of this invention provides a better performance in glitch. Compared with another prior art, the method of this invention also guarantees that DEM will not fail even if the input digital code remains constant.

    Abstract translation: 公开了一种降低数模转换器（DAC）和实现所述方法的DAC的积分非线性（INL）的方法。 本发明的方法是伪动态元素匹配（PDEM）方法。 与现有技术相比，本发明的方法提供了更好的毛刺性能。 与另一现有技术相比，本发明的方法也保证即使输入的数字代码保持恒定，DEM也不会失效。

    MULTICHIP DYNAMIC RANGE ENHANCEMENT (DRE) AUDIO PROCESSING METHODS AND APPARATUSES
    10.
    发明申请
    MULTICHIP DYNAMIC RANGE ENHANCEMENT (DRE) AUDIO PROCESSING METHODS AND APPARATUSES 审中-公开
    多媒体动态范围增强（DRE）音频处理方法和设备

    公开(公告)号：WO2016160336A1

    公开(公告)日：2016-10-06

    申请号：PCT/US2016/022578

    申请日：2016-03-16

    Applicant: CIRRUS LOGIC, INC.

    Inventor： DAS, Tejasvi ,  MELANSON, John L.

    IPC: H03G7/00 ,  H03G9/00 ,  G10L19/16

    CPC classification number: H04R3/04 ,  G10L19/167 ,  G10L21/0324 ,  H03G7/007 ,  H03G9/005 ,  H03M1/00 ,  H03M1/12 ,  H03M1/1225 ,  H03M1/18 ,  H03M2201/4135 ,  H04L1/20 ,  H04L27/2647 ,  H04R2430/01 ,  H04R2430/03

    Abstract: In accordance with embodiments of the present disclosure, a multichip circuit for processing audio signals having dynamic range enhancement information over two or more integrated circuits may include a host integrated circuit and a client integrated circuit. The host integrated circuit may be configured to determine a dynamic range enhancement gain for a digital audio input signal, process the digital audio input signal in accordance with the dynamic range enhancement gain, and transmit audio data based on the processed digital audio input signal. The client integrated circuit may be coupled to the host integrated circuit and may be configured to receive the audio data and wherein the client integrated circuit is provided with the dynamic range enhancement gain and the client integrated circuit is configured to process the audio data with the dynamic range enhancement gain.

    Abstract translation: 根据本公开的实施例，用于处理在两个或多个集成电路上具有动态范围增强信息的音频信号的多芯片电路可以包括主机集成电路和客户端集成电路。 主机集成电路可以被配置为确定用于数字音频输入信号的动态范围增强增益，根据动态范围增强增益处理数字音频输入信号，并且基于处理的数字音频输入信号发送音频数据。 客户端集成电路可以耦合到主机集成电路，并且可以被配置为接收音频数据，并且其中向客户端集成电路提供动态范围增强增益，并且客户端集成电路被配置为使用动态范围处理音频数据 范围增强增益。

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