公开(公告)号：CN104853519A

公开(公告)日：2015-08-19

申请号：CN201510273157.6

申请日：2015-05-26

Applicant: 江苏悦达新材料科技有限公司

Inventor： 丁晨东 ,  蔡铜祥 ,  贾荣

IPC: H05K1/09 ,  H05K3/04

CPC classification number: H05K1/095 ,  H05K3/041 ,  H05K2201/0332 ,  H05K2201/05

Abstract: 本发明提供一种柔性导电线路及其制作方法，将石墨膜作为导电材料应用于导电线路中；首先将导电石墨膜（1）、双面胶（2）和绝缘膜（3）进行复合，然后按照设计的线路图，利用模切打样机对复合膜进行模切，从而形成柔性导电线路。本发明中利用石墨膜优良的导电性能、优良的柔性和弯折性能，使用在柔性导电线路中，可极大缩小电子产品的体积和减少重量，使电子产品向高密度、小型化、高可靠方向发展。

公开(公告)号：CN105072803A

公开(公告)日：2015-11-18

申请号：CN201510404747.8

申请日：2015-07-10

Applicant: 武汉华星光电技术有限公司

Inventor： 熊彬 ,  曹洪睿 ,  王英琪 ,  黄俊宏

IPC: H05K1/11 ,  H05K1/09

CPC classification number: H05K1/0296 ,  H05K1/118 ,  H05K3/4015 ,  H05K2201/0332 ,  H05K2201/05 ,  H05K2201/09218

Abstract: 本发明公开了一种柔性电路板及电子设备，属于显示技术领域，解决了现有技术中焊盘处的线路容易发生断路的技术问题。该柔性电路板上设置有焊盘，以及与所述焊盘连接的主走线；所述柔性电路板上还设置有次走线，所述次走线的一端连接所述焊盘，所述次走线的另一端连接所述主走线。本发明可用于手机、平板电脑、智能穿戴设备等电子设备。

公开(公告)号：US11645953B2

公开(公告)日：2023-05-09

申请号：US17727816

申请日：2022-04-25

Applicant: InnoLux Corporation

Inventor： Hsin-Hao Huang ,  Chu-Hong Lai ,  Yu-Chih Tseng

IPC: G02F1/1333 ,  G09F9/30 ,  H05K1/18

CPC classification number: G09F9/301 ,  G02F1/133305 ,  H05K1/189 ,  H05K2201/0332 ,  H05K2201/10136

Abstract: The present disclosure provides a method for manufacturing the flexible display device. The method for manufacturing the flexible display device includes the following steps. First, a flexible substrate and a bonding structure are provided, in which the bonding structure is disposed on the flexible substrate. Subsequently, an anisotropic conductive film is provided on the bonding structure. Then, a driving circuit is provided on the anisotropic conductive film. Thereafter, the anisotropic conductive film is cured at a bonding temperature greater than or equal to 140° C. and less than or equal to 165° C.

公开(公告)号：US11842958B2

公开(公告)日：2023-12-12

申请号：US17697937

申请日：2022-03-18

Applicant: Chun-Ming Lin

Inventor： Chun-Ming Lin

IPC: H05K1/09 ,  H05K1/11 ,  H01L23/498 ,  C25D7/12 ,  H01L21/48 ,  C25D3/38 ,  H05K1/18

CPC classification number: H01L23/49866 ,  C25D3/38 ,  C25D7/12 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49827 ,  H05K1/09 ,  H05K1/112 ,  H05K1/18 ,  H05K2201/0332 ,  H05K2201/0364 ,  H05K2201/095 ,  H05K2201/09509

Abstract: The present disclosure provides a multilayer wiring structure, including a plurality of dielectric layers, a plurality of conductive wiring layers interleaved with the plurality of dielectric layers, wherein the plurality of conductive wiring layers includes copper-phosphorous alloys (such as Cu3P).

公开(公告)号：US20170042023A1

公开(公告)日：2017-02-09

申请号：US14828796

申请日：2015-08-18

Applicant: International Business Machines Corporation

Inventor： Matthew S. Doyle ,  Joseph Kuczynski ,  Kevin M. O'Connell ,  Chelsie M. Peterson ,  Mark D. Plucinski ,  Timothy J. Tofil

IPC: H05K1/02 ,  H05K3/14

CPC classification number: H05K1/0213 ,  H01L23/573 ,  H01L23/576 ,  H05K1/0274 ,  H05K1/0275 ,  H05K1/03 ,  H05K1/09 ,  H05K1/097 ,  H05K1/18 ,  H05K3/143 ,  H05K2201/0108 ,  H05K2201/0145 ,  H05K2201/0323 ,  H05K2201/0332

Abstract: In an example, a process includes forming a patterned layer on a polymer substrate. The process also includes depositing a graphene-containing material on the patterned layer to form a plurality of graphene traces of a tamper detection circuit.

Abstract translation: 在一个实例中，方法包括在聚合物基底上形成图案层。 该方法还包括在图案化层上沉积含石墨烯的材料以形成篡改检测电路的多个石墨烯迹线。

公开(公告)号：US20180324943A1

公开(公告)日：2018-11-08

申请号：US15773797

申请日：2016-10-12

Applicant: FUJIKURA LTD.

Inventor： Yasuo Fukuda ,  Takayuki Okamura

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/09 ,  H05K1/14

CPC classification number: H05K1/0281 ,  H05K1/02 ,  H05K1/09 ,  H05K1/11 ,  H05K1/147 ,  H05K2201/032 ,  H05K2201/0332

Abstract: A printed wiring board includes: an insulating base material; a first conductive layer disposed on a main surface of the insulating base material in a first region and a second region defined on a plane along the main surface; a second conductive layer disposed on a main surface of the first conductive layer in the first region; and an insulating layer disposed on the main surface of the first conductive layer in the second region. The ratio of a first evaluation value E1 to a second evaluation value E2 is 0.91 or more and 0.99 or less. The first evaluation value E1 is an evaluation value of strength of a first laminated part in the first region and the second evaluation value E2 is an evaluation value of strength of a second laminated part in the second region.

公开(公告)号：US20170042019A1

公开(公告)日：2017-02-09

申请号：US14820201

申请日：2015-08-06

Applicant: International Business Machines Corporation

Inventor： Matthew S. Doyle ,  Joseph Kuczynski ,  Kevin M. O'Connell ,  Chelsie M. Peterson ,  Mark D. Plucinski ,  Timothy J. Tofil

IPC: H05K1/02 ,  H05K1/09 ,  H05K1/03 ,  H05K1/18

CPC classification number: H05K1/0275 ,  H05K1/0213 ,  H05K1/0274 ,  H05K1/03 ,  H05K1/09 ,  H05K1/097 ,  H05K1/18 ,  H05K3/143 ,  H05K2201/0108 ,  H05K2201/0145 ,  H05K2201/0323 ,  H05K2201/0332

Abstract: In an example, a polymeric material is disclosed. The polymeric material includes a polymer substrate and a plurality of graphene traces arranged to form a tamper detection circuit on the polymer substrate.

Abstract translation: 在一个实例中，公开了聚合物材料。 聚合物材料包括聚合物基底和布置成在聚合物基底上形成篡改检测电路的多个石墨烯迹线。