-
公开(公告)号:MX9605108A
公开(公告)日:1997-08-30
申请号:MX9605108
申请日:1995-04-28
Applicant: QUALCOMM INC
Inventor: PETERZELL PAUL E , WILSON NATHANIEL B , BLACK PETER J
Abstract: En la presente se describe un aparato de control automático de ganancia (AGC) para un receptor digital. El aparato AGC incluye un amplificador de ganancia ajustable (18) que tiene un puerto de entrada par recibir una señal de entrada, un puerto de control para recibir una señal de control de ganancia, y un puerto de salida para proporcionar una señal de salida. El aparato AGC incluye además un circuito de medicion para generar una señal de potencia recibida con base en la potencia de la señal de salida. Un integrador de saturacion (22) compara la señal de potencia recibida con una señal de referencia y que será una señal de control de ganancia en respuesta a un resultado de la comparacion. El integrador de saturacion (22) incluye un circuito de decision (46) para capacitar la integracion con base en los valores de la señal de potencia recibida, la señal de referencia y la señal de control de ganancia. En una implementacion preferida la utilizacion del limitador de entrada junto con un convertidor analogico a digital capacita el acomodo de un rango dinámico de señal de entrada incrementado.
-
公开(公告)号:FI971759A
公开(公告)日:1997-07-08
申请号:FI971759
申请日:1997-04-24
Applicant: QUALCOMM INC
Inventor: PITTA THOMAS A , PETERZELL PAUL E , KORNFELD RICHARD K , WEILAND ANA L , WALLACE RAYMOND C
Abstract: A dual-band antenna system for use in a portable communications device is disclosed herein. The antenna system includes an antenna element for radiating electromagnetic energy within low-band and high-band wavelength ranges. In a preferred embodiment, a low-band isolator network, coupled to the antenna element, provides signal isolation between high-band and low-band signal paths during high-band operation. Similarly, a high-band isolator network provides signal isolation, during operation over the low-band range of wavelengths, between the high-band and low-band signal paths. During transmit and receive operation, low-band and high-band electromagnetic energy directed through the antenna is passed by the low-band and high-band isolator networks, respectively. Also included are low-band and high-band matching networks which couple the low-band and high-band isolator networks to low-band and high-band transceiver circuitry.
-
公开(公告)号:ZA967264B
公开(公告)日:1997-03-04
申请号:ZA967264
申请日:1996-08-27
Applicant: QUALCOMM INC
Inventor: PITTA THOMAS A , PETERZELL PAUL E , KORNFELD RICHARD K , WEILAND ANA L , WALLACE RAYMOND C
Abstract: A dual-band antenna system for use in a portable communications device is disclosed herein. The antenna system includes an antenna element for radiating electromagnetic energy within low-band and high-band wavelength ranges. In a preferred embodiment, a low-band isolator network, coupled to the antenna element, provides signal isolation between high-band and low-band signal paths during high-band operation. Similarly, a high-band isolator network provides signal isolation, during operation over the low-band range of wavelengths, between the high-band and low-band signal paths. During transmit and receive operation, low-band and high-band electromagnetic energy directed through the antenna is passed by the low-band and high-band isolator networks, respectively. Also included are low-band and high-band matching networks which couple the low-band and high-band isolator networks to low-band and high-band transceiver circuitry.
-
公开(公告)号:CA2467295A1
公开(公告)日:1996-06-20
申请号:CA2467295
申请日:1995-12-11
Applicant: QUALCOMM INC
Inventor: PETERZELL PAUL E , WHEATLEY CHARLES E III , WEILAND ANA L , KORNFELD RICHARD K
IPC: H04B1/06 , H03G1/00 , H03G3/30 , H04B20060101 , H04B1/10 , H04B1/16 , H04B1/18 , H04B1/40 , H04B1/7075 , H04B1/7097 , H04B3/06 , H04B7/005 , H04B7/26 , H04B15/00
Abstract: An apparatus to increase a radio receiver's immunity to radio frequency interference, the radio receiver receiving a signal, the apparatus comprising: a switch (1105) coupled to the received signal, the switch (1105) having an open position and a closed position; a resistance (1101), a first end of the resistance (1101) being coupled to the closed position of the switch (1105) and a second end of the resistance (1101) being coupled to a ground potential; an amplifier (1101) having an input coupled to the open position of the switch (1105), for generating an amplified received signal at an output; a controller coupled to the switch (1105), for switching the switch (1105) to the closed position in response to the received signal exceeding a predetermined power level, said received signal conducting through said switch (1105) and said resistance (1101) to ground potential when said switch (1105) is in said closed position; and said resistance (1101) creating an impedance mismatch at the input to said amplifier (1110) when said switch (1105) is in closed position, thereby reducing the gain contributed by said amplifier (1110).
-
公开(公告)号:ZA9510321B
公开(公告)日:1996-06-19
申请号:ZA9510321
申请日:1995-12-05
Applicant: QUALCOMM INC
Inventor: PETERZELL PAUL E , WHEATLEY CHARLES E III , KORNFELD RICHARD K , WEILAND ANA L
IPC: H04B1/06 , H03G1/00 , H03G3/30 , H04B20060101 , H04B1/10 , H04B1/16 , H04B1/18 , H04B1/40 , H04B1/7075 , H04B1/7097 , H04B3/06 , H04B7/005 , H04B7/26 , H04B15/00 , H04J , H04B , H04L
Abstract: An apparatus to increase a radio receiver's immunity to radio frequency interference, the radio receiver receiving a signal, the apparatus comprising: a switch (1105) coupled to the received signal, the switch (1105) having an open position and a closed position; a resistance (1101), a first end of the resistance (1101) being coupled to the closed position of the switch (1105) and a second end of the resistance (1101) being coupled to a ground potential; an amplifier (1101) having an input coupled to the open position of the switch (1105), for generating an amplified received signal at an output; a controller coupled to the switch (1105), for switching the switch (1105) to the closed position in response to the received signal exceeding a predetermined power level, said received signal conducting through said switch (1105) and said resistance (1101) to ground potential when said switch (1105) is in said closed position; and said resistance (1101) creating an impedance mismatch at the input to said amplifier (1110) when said switch (1105) is in closed position, thereby reducing the gain contributed by said amplifier (1110).
-
公开(公告)号:ZA953124B
公开(公告)日:1996-04-02
申请号:ZA953124
申请日:1995-04-18
Applicant: QUALCOMM INC
Inventor: PETERZELL PAUL E , WILSON NATHANIEL B , BLACK PETER J
Abstract: An automatic gain control (AGC) apparatus for a digital receiver is disclosed herein. The AGC apparatus includes an adjustable gain amplifier having an input port for receiving an input signal, a control port for receiving a gain control signal, and an output port for providing an output signal. The AGC apparatus further includes a measurement circuit for generating a received power signal based on the power of the output signal. A saturating integrator compares the received power signal to a reference signal and generates an gain control signal in response to a result of the comparison. The saturating integrator includes a decision circuit for enabling integration based on values of the received power signal, the reference signal, and the gain control signal. In a preferred implementation the utilization of an input limiter in conjunction with an analog to digital converter enables accommodation of an increased input signal dynamic range. Accordingly, the AGC apparatus is capable of being used in digital demodulation of FM signals. The AGC apparatus may also be employed within a dual mode receiver designed to process both FM and code division multiple access (CDMA) input signals.
-
97.
公开(公告)号:ZA95605B
公开(公告)日:1995-12-20
申请号:ZA95605
申请日:1995-01-25
Applicant: QUALCOMM INC
Inventor: WILSON NATHANIEL B , BLACK PETER J , PETERZELL PAUL E
IPC: H03D3/00 , H03D3/24 , H03G3/20 , H03D7/16 , H03G3/30 , H04B1/30 , H04L27/14 , H04L27/22 , H03G , H03D
Abstract: An automatic gain control (AGC) and D.C. offset correction method and apparatus for controlling signal power of a received RF signal within a dual mode quadrature receiver is disclosed herein. In a preferred implementation the automatic gain control apparatus may be adjusted to provide a desired control response to various fading characteristics of a received FM, FSK, GMSK, QPSK, or BPSK signal. The AGC apparatus includes an adjustable gain amplifier having an input port for receiving an input signal, a control port for receiving a gain control signal, and an output port for providing an output signal. A quadrature downconverter coupled to the output port serves to translate the frequency of the output signal to a baseband frequency, thereby producing baseband signals. In a preferred implementation the downconverter is operative to map the carrier frequency of the output signal to a baseband frequency offset by a predetermined margin from D.C. Two high gain active lowpass filters provide out-of-band signal rejection for the baseband signals. A D.C. feedthrough suppression loop, disposed to receive said baseband signal, suppresses D.C. offsets produced by the downconverter and lowpass filters, hence providing a compensated baseband signal. The AGC apparatus is further disposed to generate a received power signal based on the power of the output signal. A saturating integrator compares the received power signal to a reference signal and produces the gain control signal by integrating or by refraining from integration based on values of the reference, received power signal, and gain control signals, thereby extending the usable dynamic range of the receiver for FM mode.
-
98.
公开(公告)号:CA2163883A1
公开(公告)日:1995-11-09
申请号:CA2163883
申请日:1995-04-28
Applicant: QUALCOMM INC
Inventor: WILSON NATHANIEL B , BLACK PETER J , PETERZELL PAUL E
Abstract: An automatic gain control (AGC) and D.C. offset correction method and appara tus for controlling signal power of a received RF signal within a dual mode quadrature receiver is disclosed herein. The AGC a pparatus includes an adjustable gain amplifier (18). A quadrature downconverter (20) coupled to the amplifier (18) serves to transl ate the frequency of the output signal to a baseband fre quency which is offset by a predetermined margin from D.C. Two high gain active low pass filters (76 and 78) provide out-of-band signal reje ction for the baseband signals. A D.C. feedthrough suppression loop supresses D.C. offsets produced by a downconverter (20) and the lowpas s filters (76 and 78). The AGC apparatus also generates a received power signa l based on the power of the output signal. A saturating integrator compares the received power signal to a reference signal and prod uces the gain control signal by integrating or by refrai ning from integration based on values of the reference, received power signal, an d gain control signals.
-
公开(公告)号:BRPI0207274B1
公开(公告)日:2016-07-05
申请号:BR0207274
申请日:2002-02-15
Applicant: QUALCOMM INC
Inventor: RAGHUPATHY ARUN , WALKER BRETT C , HOLENSTEIN CHRISTIAN , SIH GILBERT C , KANG INYUP , SEVERSON MATTHEW L , PETERZELL PAUL E , CHALLA RAGHU , LI TAO
Abstract: "arquitetura de receptor de conversão direta". uma arquitetura de receptor de conversão descendente direta possuindo um loop de dc para remover o offset de dc a partir das componentes de sinal, um amplificador digital de ganho variável (dvga) para prover uma faixa de ganhos, um loop de controle de ganho automático (agc) para prover controle de ganho para o dvga e circuitos de rf/analógico e uma unidade de interface de barramento serial (sbi) para prover controles para os circuitos de rf/analógico através de um barramento serial. o dvga pode ser projetado vantajosamente e localizado como aqui descrito. o modo operacional do loop de vga pode ser selecionado com base no modo operacional do loop de dc, uma vez que estes dois laops interagem um com o outro. a duração de tempo do loop de dc é operada em um modo de aquisição que pode ser selecionado para ser inversamente proporcional à largura de banda do loop de dc no modo de aquisição. os controles para alguns ou todos os circuitos de rf/analógico podem ser providos através do barramento serial.
-
公开(公告)号:CA2723058C
公开(公告)日:2012-12-11
申请号:CA2723058
申请日:2002-02-15
Applicant: QUALCOMM INC
Inventor: LI TAO , HOLENSTEIN CHRISTIAN , KANG INYUP , WALKER BRETT C , PETERZELL PAUL E , CHALLA RAGHU , SEVERSON MATTHEW L , RAGHUPATHY ARUN , SIH GILBERT C
Abstract: A direct downconversion receiver architecture having a DC loop to remove DC offset from the signal components, a digital variable gain amplifier (DVGA) to provide a range of gains, an automatic gain control (AGC) loop to provide gain control for the DVGA and RF/analog circuitry, and a serial bus interface (SBI) unit to provide controls for the RF/analog circuitry via a serial bus. The DVGA may be advantageously designed and located as described herein. The operating mode of the VGA loop may be selected based on the operating mode of the DC loop, since these two loops interact with one another. The duration of time the DC loop is operated in an acquisition mode may be selected to be inversely proportional to the DC loop bandwidth in the acquisition mode. The controls for some or all of the RF/analog circuitry may be provided via the serial bus.
-
-
-
-
-
-
-
-
-