公开(公告)号：US09824991B2

公开(公告)日：2017-11-21

申请号：US15421340

申请日：2017-01-31

Applicant: INTEL CORPORATION

Inventor： Aleksandar Aleksov ,  Tony Dambrauskas ,  Danish Faruqui ,  Mark S. Hlad ,  Edward R. Prack

IPC: H01L21/58 ,  H01L23/00 ,  H01L21/78 ,  H01L21/02 ,  H01L21/027 ,  H01L21/311 ,  H01L25/065 ,  H01L25/00 ,  H01L21/683 ,  H01L21/768

CPC classification number: H01L24/11 ,  H01L21/02118 ,  H01L21/02263 ,  H01L21/0234 ,  H01L21/0271 ,  H01L21/0273 ,  H01L21/31144 ,  H01L21/3205 ,  H01L21/563 ,  H01L21/6835 ,  H01L21/76883 ,  H01L21/76898 ,  H01L21/78 ,  H01L23/3142 ,  H01L23/49894 ,  H01L24/05 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68304 ,  H01L2221/68327 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/05647 ,  H01L2224/1147 ,  H01L2224/11474 ,  H01L2224/1148 ,  H01L2224/1162 ,  H01L2224/11849 ,  H01L2224/1191 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16057 ,  H01L2224/16058 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/73204 ,  H01L2224/81011 ,  H01L2224/81024 ,  H01L2224/81026 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81203 ,  H01L2224/81207 ,  H01L2224/81375 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2224/81913 ,  H01L2224/831 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/3841 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/05552

Abstract: Electronic assemblies and their manufacture are described. One embodiment relates to a method including depositing an organic thin film layer on metal bumps on a semiconductor wafer, the organic thin film layer also being formed on a surface adjacent to the metal bumps on the wafer. The wafer is diced into a plurality of semiconductor die structures, the die structures including the organic thin film layer. The semiconductor die structures are attached to substrates, wherein the attaching includes forming a solder bond between the metal bumps on a die structure and bonding pads on a substrate, and wherein the solder bond extends through the organic thin film layer. The organic thin film layer is then exposed to a plasma. Other embodiments are described and claimed.

公开(公告)号：US09788581B2

公开(公告)日：2017-10-17

申请号：US14865440

申请日：2015-09-25

Applicant: Intel Corporation

Inventor： Aleksandar Aleksov ,  Adel Elsherbini ,  Sasha Oster ,  Braxton Lathrop ,  Nadine L. Dabby ,  Feras Eid

IPC: G06F3/01 ,  H05K7/00 ,  A41D1/00 ,  G06F1/16 ,  H05K1/03 ,  H05K1/02

CPC classification number: A41D1/002 ,  G06F1/163 ,  H05K1/0283 ,  H05K1/0296 ,  H05K1/038 ,  H05K2201/0133 ,  H05K2201/09263 ,  H05K2201/10098 ,  H05K2201/10151

Abstract: Some forms relate to an electronic system that includes a textile. The electronic system includes a stretchable body that includes an integrated circuit that is configured to compute and communicate with an external device, wherein the stretchable body further includes at least one of (i) a power source that provides power to at least one of the electronic components; (ii) at least one sensor; (iii) a sensing node that receives signals from each sensor and sends signals to the integrated circuit; and (iv) an antenna that is configured to send and receive signals to and from the integrated circuit and the external device; and a textile attached to the stretchable body.

公开(公告)号：US09685421B2

公开(公告)日：2017-06-20

申请号：US14727205

申请日：2015-06-01

Applicant: Intel Corporation

Inventor： Aleksandar Aleksov ,  Ravindranath V Mahajan ,  Omkar Karhade ,  Nitin Deshpande

IPC: H01L21/00 ,  H01L23/00 ,  H01L23/13 ,  H01L21/683 ,  H01L21/677 ,  H01L21/56 ,  H01L23/15

CPC classification number: H01L24/83 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/67709 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/15 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/82 ,  H01L24/92 ,  H01L24/96 ,  H01L2221/68309 ,  H01L2221/68313 ,  H01L2221/68331 ,  H01L2221/68363 ,  H01L2224/04105 ,  H01L2224/2101 ,  H01L2224/2919 ,  H01L2224/32237 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2224/81001 ,  H01L2224/81005 ,  H01L2224/8312 ,  H01L2224/92244 ,  H01L2224/96 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/181 ,  H01L2224/19 ,  H01L2924/00014 ,  H01L2924/00

Abstract: The subject matter of the present description relates to methods for the precise integration of microelectronic dice within a multichip package which substantially reduce or eliminate any misalign caused by the movement of the microelectronic dice during the integration process. These methods may include the use of a temporary adhesive in conjunction with a carrier having at least one recess for microelectronic die alignment, the use of a precision molded carrier for microelectronic die alignment, the use of magnetic alignment of microelectronic dice on a reusable carrier, and/or the use of a temporary adhesive with molding processes on a reusable carrier.

公开(公告)号：US20150338718A1

公开(公告)日：2015-11-26

申请号：US14690341

申请日：2015-04-17

Applicant: INTEL CORPORATION

Inventor： Chong ZHANG ,  Aleksandar Aleksov ,  Islam A. Salama ,  Tiansi Wang ,  Aravinda Kar

IPC: G02F1/33

CPC classification number: G02F1/33 ,  G02F1/113 ,  G02F1/332

Abstract: An acousto-optic deflector with multiple acoustic transducers is described that is suitable for use in substrate processing. In one example a method includes transmitting an optic beam through an acousto-optic deflector, applying an acoustic signal with a phase delay across multiple transducers of the acousto-optic deflector to deflect the beam along a first axis by the acousto-optic deflector, and directing the deflected beam onto a workpiece.

Abstract translation: 描述了具有多个声换能器的声光偏转器，其适用于基板处理。 在一个示例中，一种方法包括通过声光偏转器传输光束，在声光偏转器的多个换能器上施加具有相位延迟的声信号，以通过声光偏转器沿着第一轴偏转光束;以及 将偏转的光束引导到工件上。

公开(公告)号：US12255225B2

公开(公告)日：2025-03-18

申请号：US17033279

申请日：2020-09-25

Applicant: Intel Corporation

Inventor： Thomas Sounart ,  Kaan Oguz ,  Neelam Prabhu Gaunkar ,  Aleksandar Aleksov ,  Henning Braunisch ,  I-Cheng Tung

IPC: H01L21/00 ,  H01L49/02

Abstract: Low leakage thin film capacitors for decoupling, power delivery, integrated circuits, related systems, and methods of fabrication are disclosed. Such thin film capacitors include a titanium dioxide dielectric and one or more noble metal oxide electrodes. Such thin film capacitors are suitable for high voltage applications and provide low current density leakage.

公开(公告)号：US12255130B2

公开(公告)日：2025-03-18

申请号：US16884452

申请日：2020-05-27

Applicant: INTEL CORPORATION

Inventor： Hongxia Feng ,  Jeremy Ecton ,  Aleksandar Aleksov ,  Haobo Chen ,  Xiaoying Guo ,  Brandon C. Marin ,  Zhiguo Qian ,  Daryl Purcell ,  Leonel Arana ,  Matthew Tingey

IPC: H01L23/522 ,  H01L23/66

Abstract: Processes and structures resulting therefrom for the improvement of high speed signaling integrity in electronic substrates of integrated circuit packages, which is achieved with the formation of airgap structures within dielectric material(s) between adjacent conductive routes that transmit/receive electrical signals, wherein the airgap structures decrease the capacitance and/or decrease the insertion losses in the dielectric material used to form the electronic substrates.

公开(公告)号：US12176323B2

公开(公告)日：2024-12-24

申请号：US17728813

申请日：2022-04-25

Applicant: Intel Corporation

Inventor： Adel A. Elsherbini ,  Henning Braunisch ,  Aleksandar Aleksov ,  Shawna M. Liff ,  Johanna M. Swan ,  Patrick Morrow ,  Kimin Jun ,  Brennen Mueller ,  Paul B. Fischer

IPC: H01L25/065 ,  H01L23/498 ,  H01L25/00

Abstract: Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include: a first die having a first surface and an opposing second surface, first conductive contacts at the first surface of the first die, and second conductive contacts at the second surface of the first die; and a second die having a first surface and an opposing second surface, and first conductive contacts at the first surface of the second die; wherein the second conductive contacts of the first die are coupled to the first conductive contacts of the second die by interconnects, the second surface of the first die is between the first surface of the first die and the first surface of the second die, and a footprint of the first die is smaller than and contained within a footprint of the second die.

公开(公告)号：US12155372B2

公开(公告)日：2024-11-26

申请号：US17688065

申请日：2022-03-07

Applicant: Intel Corporation

Inventor： Georgios Dogiamis ,  Aleksandar Aleksov ,  Feras Eid ,  Telesphor Kamgaing ,  Johanna M. Swan

IPC: H03H9/54 ,  H03H9/02 ,  H03H9/64

Abstract: Embodiments may relate to a die such as an acoustic wave resonator (AWR) die. The die may include a first filter and a second filter in the die body. The die may further include an electromagnetic interference (EMI) structure that surrounds at least one of the filters. Other embodiments may be described or claimed.

公开(公告)号：US12136596B2

公开(公告)日：2024-11-05

申请号：US18374595

申请日：2023-09-28

Applicant: Intel Corporation

Inventor： Aleksandar Aleksov ,  Johanna M. Swan

IPC: H01L23/538 ,  H01L23/00 ,  H01L23/13 ,  H01L23/367 ,  H01L23/498 ,  H01L25/065 ,  H01L25/16

Abstract: Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate including a dielectric material having a first surface and an opposing second surface, a first material on at least a portion of the second surface, and a second material on at least a portion of the first material, wherein the second material has a different material composition than the first material.

公开(公告)号：US20240274576A1

公开(公告)日：2024-08-15

申请号：US18632919

申请日：2024-04-11

Applicant: Intel Corporation

Inventor： Feras Eid ,  Adel A. Elsherbini ,  Aleksandar Aleksov ,  Shawna M. Liff ,  Johanna M. Swan

IPC: H01L25/065 ,  H01L23/00

CPC classification number: H01L25/0655 ,  H01L24/06 ,  H01L24/08 ,  H01L24/09 ,  H01L24/17 ,  H01L24/29 ,  H01L24/30 ,  H01L25/0652 ,  H01L2224/08225 ,  H01L2224/09177 ,  H01L2224/81

Abstract: Disclosed herein are microelectronic assemblies including direct bonding, as well as related structures and techniques. For example, in some embodiments, a microelectronic assembly may include a first microelectronic component and a second microelectronic component coupled to the first microelectronic component by a direct bonding region including metal contacts that are distributed non-uniformly. In some embodiments, a microelectronic assembly may include a first microelectronic component and a second microelectronic component coupled to the first microelectronic component by a direct bonding region, wherein the direct bonding region includes a first metal contact and a second metal contact, the first metal contact has a larger area than the second metal contact.