公开(公告)号：US08013683B2

公开(公告)日：2011-09-06

申请号：US12584192

申请日：2009-09-01

Applicant: Junichi Arai

Inventor： Junichi Arai

IPC: H03L1/00

CPC classification number: H03L1/04 ,  H05K1/0206 ,  H05K1/0212 ,  H05K2201/09781 ,  H05K2201/10022 ,  H05K2201/10075 ,  H05K2201/10462 ,  H05K2201/10545 ,  H05K2203/165

Abstract: A constant-temperature type crystal oscillator includes: a crystal unit that is installed on one principal surface of a circuit substrate, and chip resistors, which function as heating elements, and which are installed on the other principal surface of the circuit substrate so as to face a principal surface of the crystal unit, the chip resistors heating up the crystal unit to keep an operational temperature of the crystal unit constant. A heating metal film facing the principal surface of the crystal unit is provided on the one principal surface of the circuit substrate. A heat conducting material is interposed between the principal surface of the crystal unit and the heating metal film to perform thermal coupling therebetween. The heating metal film is thermally coupled to electrode terminals of the chip resistors via a plurality of electrode through holes.

Abstract translation: 恒温型晶体振荡器包括：安装在电路基板的一个主表面上的晶体单元和用作加热元件的片式电阻器，并且安装在电路基板的另一个主表面上，以便 面对晶体单元的主表面，芯片电阻加热晶体单元以保持晶体单元的工作温度恒定。 在电路基板的一个主表面上设置面对晶体单元的主表面的加热金属膜。 导热材料插入在晶体单元的主表面和加热金属膜之间，以在它们之间进行热耦合。 加热金属膜通过多个电极通孔热耦合到芯片电阻器的电极端子。

公开(公告)号：US07470984B2

公开(公告)日：2008-12-30

申请号：US11388536

申请日：2006-03-23

Applicant: Yin Men Lai ,  Benjamin Selvaraj ,  Gangadevi Payedathaly

Inventor： Yin Men Lai ,  Benjamin Selvaraj ,  Gangadevi Payedathaly

IPC: H01L23/12 ,  H01L29/00

CPC classification number: H05K3/3442 ,  H01C1/02 ,  H01C1/148 ,  H01C7/001 ,  H05K2201/10462 ,  H05K2201/10636 ,  Y02P70/611 ,  Y02P70/613

Abstract: Embodiments of the present invention provide an apparatus, a system, and a method, and include a generally rectilinear body having a first surface and a second surface. The second surface is substantially perpendicular to the first surface. An electrically operative element is disposed on the first surface, and has opposite ends. Spaced apart terminations are disposed on the second surface, and are electrically coupled with the opposite ends of the electrically operative element. The terminations are designed to be coupled with a substrate.

Abstract translation: 本发明的实施例提供了一种装置，系统和方法，并且包括具有第一表面和第二表面的大致直线的主体。 第二表面基本上垂直于第一表面。 电操作元件设置在第一表面上，并具有相对端。 间隔开的终端设置在第二表面上，并且与电操作元件的相对端电耦合。 端子被设计成与衬底耦合。

公开(公告)号：US20080285246A1

公开(公告)日：2008-11-20

申请号：US12117126

申请日：2008-05-08

Applicant: Yoshihiro KAWAMURA

Inventor： Yoshihiro KAWAMURA

IPC: H05K7/02

CPC classification number: H05K3/306 ,  H05K3/305 ,  H05K3/3447 ,  H05K3/3452 ,  H05K2201/10015 ,  H05K2201/10462 ,  H05K2201/10598 ,  H05K2201/2036 ,  H05K2203/0191 ,  H05K2203/0588 ,  Y10T29/43 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49165

Abstract: A resist 7 of a predetermined thickness is formed on a printed circuit board 1 except electrode-opposing portions 1a (FIG. 1A), and a silk screen printed layer 9 of a predetermined thickness is formed on the resist 7 (FIG. 1B). Thereafter, a concave portion 2b of a film capacitor 2 is bonded to the silk screen printed layer 9 by an adhesive double coated tape 6 of a predetermined thickness in such a manner that electrode portions 2a of the film capacitor 2 are opposed respectively to the electrode-opposing portions 1a of the printed circuit board 1 (FIG. 1D). Here, the sum of the thicknesses of the resist 7, silk screen printed layer 9 and adhesive double coated tape 6 is not smaller than a concave-convex height difference L1 of the film capacitor 2, and with this arrangement the electrode portions 2a of the film capacitor 2 are prevented from interfering with the printed circuit board 1. An adhesive is not used, and therefore a problem with respect to environment-affecting substances is solved, and at the same time difficulty involved in the control of a bonding strength can be overcome.

Abstract translation: 除了电极对置部分1a（图1A）之外，在印刷电路板1上形成预定厚度的抗蚀剂7，并且在抗蚀剂7上形成预定厚度的丝网印刷层9（图1 B）。 此后，通过具有预定厚度的粘合剂双面胶带6将薄膜电容器2的凹部2b与丝网印刷层9接合，使得薄膜电容器2的电极部分2a分别相对于 印刷电路板1的电极对置部分1a（图1D）。 这里，抗蚀剂7，丝网印刷层9和粘合剂双面胶带6的厚度的总和不小于膜电容器2的凹凸高度差L 1，并且通过这种布置，电极部分2a 可以防止薄膜电容器2干扰印刷电路板1。 不使用粘合剂，因此解决了对环境影响物质的问题，同时可以克服粘合强度的控制困难。

公开(公告)号：US20080224786A1

公开(公告)日：2008-09-18

申请号：US12075589

申请日：2008-03-12

Applicant: James L. Stolpman ,  Thomas A. Knecht ,  Jerry L. Shirar

Inventor： James L. Stolpman ,  Thomas A. Knecht ,  Jerry L. Shirar

IPC: H03B5/04 ,  H03L1/04

CPC classification number: H03B5/04 ,  H03B5/36 ,  H03L1/04 ,  H05K1/0201 ,  H05K1/141 ,  H05K3/3405 ,  H05K3/3436 ,  H05K3/403 ,  H05K2201/045 ,  H05K2201/049 ,  H05K2201/09181 ,  H05K2201/10068 ,  H05K2201/10151 ,  H05K2201/10166 ,  H05K2201/10371 ,  H05K2201/10446 ,  H05K2201/10462 ,  H05K2201/10515 ,  H05K2201/10651

Abstract: An oscillator assembly includes an oscillator circuit that is configured to generate a frequency signal. A temperature compensation circuit is in communication with the oscillator circuit and adapted to adjust the frequency signal in response to changes in temperature. The oscillator and temperature compensation circuits are located within an oven. A heater and a temperature sensor in communication with the heater are also both located in the oven. The temperature sensor is adapted to directly control the heater in response to changes in temperature. In one embodiment, the oscillator components are mounted to a ball grid array substrate which, in turn, is mounted on a printed circuit board. In this embodiment, a resonator overlies the ball grid array substrate and a lid covers and defines an oven and enclosure for the resonator and the ball grid array substrate. The oscillator and temperature compensation circuit are defined on the ball grid array substrate.

Abstract translation: 振荡器组件包括被配置为产生频率信号的振荡器电路。 温度补偿电路与振荡器电路通信，并且适于根据温度变化调整频率信号。 振荡器和温度补偿电路位于烤箱内。 与加热器连通的加热器和温度传感器也都位于烤箱中。 温度传感器适用于根据温度变化直接控制加热器。 在一个实施例中，振荡器部件被安装到球栅阵列基板，该栅格阵列基板又安装在印刷电路板上。 在该实施例中，谐振器覆盖在球栅阵列基板上，并且盖覆盖并限定用于谐振器和球栅阵列基板的烤箱和外壳。 振荡器和温度补偿电路定义在球栅阵列基板上。

公开(公告)号：US20070249188A1

公开(公告)日：2007-10-25

申请号：US10588142

申请日：2004-11-30

Applicant: Wolfgang Mueller ,  Thomas Uhland ,  Dirk Schmidt ,  Ibrahim Degirmenci ,  Frank Distler

Inventor： Wolfgang Mueller ,  Thomas Uhland ,  Dirk Schmidt ,  Ibrahim Degirmenci ,  Frank Distler

IPC: H05K1/18 ,  H01R13/46

CPC classification number: H05K3/301 ,  H05K1/18 ,  H05K3/0061 ,  H05K5/0056 ,  H05K2201/10015 ,  H05K2201/10303 ,  H05K2201/10462 ,  H05K2201/10606 ,  H05K2201/2045

Abstract: A device for the shakeproof accommodation of electrical special components and/or electrical circuits, particularly in a development as a second component set in a control unit, is made up of a carrier, onto which a circuit substrate, having special components fastened to it, is mounted in an electrically insulated manner over a partial surface, preferably by adhesion

Abstract translation: 用于特殊组件和/或电路的防震容纳装置，特别是作为设置在控制单元中的第二组件的开发中的装置由载体组成，其上具有紧固到其上的特殊部件的电路基板， 优选通过粘附而以部分表面以电绝缘方式安装

公开(公告)号：US20070117422A1

公开(公告)日：2007-05-24

申请号：US11582148

申请日：2006-10-17

Applicant: Lee Shinaberger ,  Dean Smith ,  Tom Anderson ,  Bharat Rawal

Inventor： Lee Shinaberger ,  Dean Smith ,  Tom Anderson ,  Bharat Rawal

IPC: H05K1/00

CPC classification number: H01G2/06 ,  H01G11/82 ,  H01R12/716 ,  H05K3/301 ,  H05K3/305 ,  H05K3/32 ,  H05K2201/10015 ,  H05K2201/10189 ,  H05K2201/10325 ,  H05K2201/10462 ,  H05K2201/10962 ,  H05K2203/066 ,  Y02E60/13

Abstract: An electrochemical double layer capacitor (DLC) is configured for mounting on a PCB. A first connector component is configured at each individual terminal lead of the DLC capacitor. A second connector component is mounted on the PCB and includes a number of parallel connector elements at a footprint location for electrical mating contact with the DLC leads. The connector configuration produces a minimal increase in the ESR of the capacitor when mounted on the PCB.

Abstract translation: 电化学双层电容器（DLC）被配置为安装在PCB上。 第一连接器部件配置在DLC电容器的每个单独的引线上。 第二连接器部件安装在PCB上，并且在位置上包括多个并联连接器元件，用于与DLC引线电配合接触。 当安装在PCB上时，连接器配置会使电容器的ESR发生最小的增加。

公开(公告)号：US07106609B2

公开(公告)日：2006-09-12

申请号：US11157610

申请日：2005-06-20

Applicant: Robert F. Wallace ,  Robert D. Norman ,  Eliyahou Harari

Inventor： Robert F. Wallace ,  Robert D. Norman ,  Eliyahou Harari

IPC: G11C5/00 ,  G11C5/06

CPC classification number: G06F3/0601 ,  G06F13/385 ,  G06F2003/0694 ,  G06K7/0047 ,  G06K19/07732 ,  G06K19/07741 ,  G06K19/07743 ,  G11C5/04 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83385 ,  H05K1/141 ,  H05K3/3421 ,  H05K7/1431 ,  H05K2201/10159 ,  H05K2201/10462 ,  H05K2201/10484 ,  H05K2203/1572 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A very small computer memory card is densely packed with a large number of flash EEPROM integrated circuit chips. A computer memory system provides for the ability to removably connect one or more of such cards with a common controller circuit that interfaces between the memory cards and a standard computer system bus. Alternately, each card can be provided with the necessary controller circuitry and thus is connectable directly to the computer system bus. An electronic system is described for a memory system and its controller within a single memory card. In a preferred physical arrangement, the cards utilize a main circuit board with a plurality of sub-boards attached thereto on both sides, each sub-board carrying several integrated circuit chips.

公开(公告)号：US06947332B2

公开(公告)日：2005-09-20

申请号：US10628746

申请日：2003-07-28

Applicant: Robert F. Wallace ,  Robert D. Norman ,  Eliyahou Harari

Inventor： Robert F. Wallace ,  Robert D. Norman ,  Eliyahou Harari

IPC: G06F3/06 ,  G06F12/00 ,  G06F13/00 ,  G06F13/38 ,  G06K7/00 ,  G11C5/00 ,  G11C5/02 ,  G11C7/00 ,  G11C16/04 ,  G11C16/06 ,  H05K1/14

CPC classification number: G06F3/0601 ,  G06F13/385 ,  G06F2003/0694 ,  G06K7/0047 ,  G06K19/07732 ,  G06K19/07741 ,  G06K19/07743 ,  G11C5/04 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83385 ,  H05K1/141 ,  H05K3/3421 ,  H05K7/1431 ,  H05K2201/10159 ,  H05K2201/10462 ,  H05K2201/10484 ,  H05K2203/1572 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A very small computer memory card is densely packed with a large number of flash EEPROM integrated circuit chips. A computer memory system provides for the ability to removably connect one or more of such cards with a common controller circuit that interfaces between the memory cards and a standard computer system bus. Alternately, each card can be provided with the necessary controller circuitry and thus is connectable directly to the computer system bus. An electronic system is described for a memory system and its controller within a single memory card. In a preferred physical arrangement, the cards utilize a main circuit board with a plurality of sub-boards attached thereto on both sides, each sub-board carrying several integrated circuit chips.

Abstract translation: 一个非常小的电脑记忆卡密集地装有大量的闪存EEPROM集成电路芯片。 计算机存储器系统提供了将一个或多个这样的卡可拆卸地连接到存储卡与标准计算机系统总线之间接口的公共控制器电路的能力。 或者，每个卡可以提供必要的控制器电路，并且因此可以直接连接到计算机系统总线。 描述了一种用于存储系统及其控制器在单个存储卡内的电子系统。 在优选的物理布置中，卡片利用其两侧附着有多个子板的主电路板，每个子板承载多个集成电路芯片。

公开(公告)号：US20020119366A1

公开(公告)日：2002-08-29

申请号：US10005688

申请日：2001-11-08

Inventor： Koji Tomitsuka ,  Kenji Ogata ,  Taisuke Takiguchi ,  Shunji Watanabe

IPC: H01M006/00 ,  H01M010/00

CPC classification number: H01G4/228 ,  H01G2/065 ,  H01M2/0222 ,  H01M2/30 ,  H01M2/34 ,  H01M10/0427 ,  H05K1/181 ,  H05K2201/10462 ,  Y02P70/611

Abstract: A secondary battery or capacitor fitted with terminals and occupies less area on a packaging substrate. Either one of the positive and negative terminals is mounted within the outer surface of the secondary battery or capacitor. This reduces the area occupied by the secondary battery or capacitor fitted with terminals on the substrate. At least one step is formed on the terminal positioned opposite to the substrate. This prevents electrical shorting between the positive electrode can and the negative terminal.

Abstract translation: 装有端子的二次电池或电容器在封装基板上占据较少的面积。 正极和负极中的任一个端子安装在二次电池或电容器的外表面内。 这样就减少了二次电池或电容器上装有端子的面积。 在与基板相对定位的端子上形成至少一个台阶。 这防止了正电极罐与负极端子之间的电短路。

公开(公告)号：US06434034B1

公开(公告)日：2002-08-13

申请号：US09888167

申请日：2001-06-22

Applicant: Robert F. Wallace ,  Robert D. Norman ,  Eliyahou Harari

Inventor： Robert F. Wallace ,  Robert D. Norman ,  Eliyahou Harari

IPC: G11C502

CPC classification number: G06F3/0601 ,  G06F13/385 ,  G06F2003/0694 ,  G06K7/0047 ,  G06K19/07732 ,  G06K19/07741 ,  G06K19/07743 ,  G11C5/04 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83385 ,  H05K1/141 ,  H05K3/3421 ,  H05K7/1431 ,  H05K2201/10159 ,  H05K2201/10462 ,  H05K2201/10484 ,  H05K2203/1572 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A very small computer memory card is densely packed with a large number of flash EEPROM integrated circuit chips. A computer memory system provides for the ability to removably connect one or more of such cards with a common controller circuit that interfaces between the memory cards and a standard computer system bus. Alternately, each card can be provided with the necessary controller circuitry and thus is connectable directly to the computer system bus. An electronic system is described for a memory system and its controller within a single memory card. In a preferred physical arrangement, the cards utilize a main circuit board with a plurality of sub-boards attached thereto on both sides, each sub-board carrying several integrated circuit chips.

Abstract translation: 一个非常小的电脑记忆卡密集地装有大量的闪存EEPROM集成电路芯片。 计算机存储器系统提供了将一个或多个这样的卡可拆卸地连接到存储卡与标准计算机系统总线之间接口的公共控制器电路的能力。 或者，每个卡可以提供必要的控制器电路，并且因此可以直接连接到计算机系统总线。 描述了一种用于存储系统及其控制器在单个存储卡内的电子系统。 在优选的物理布置中，卡片利用其两侧附着有多个子板的主电路板，每个子板承载多个集成电路芯片。