公开(公告)号：JP2002108607A

公开(公告)日：2002-04-12

申请号：JP2001289044

申请日：2001-09-21

Applicant: ST MICROELECTRONICS INC

Inventor： BALLACHINO WILLIAM E

IPC: G06F7/507 ,  G06F7/50

Abstract: PROBLEM TO BE SOLVED: To provide an adder circuit capable of promptly adding two arguments. SOLUTION: This M-bit adder capable of receiving a first M-bit argument, a second M-bit argument and a carry-in (CI) bit is provided. The M-bit adder is provided with M adder cells arranged in R lines, a minimum digit adder cell in the first line among lines consisting of the adder cells receives a first data bit AX from the first M-bit argument and a first data bit BX from the second M-bit argument and generates a first carry-out bit CX (1) with first condition and a second carry-out bit CX (0) with second condition. The CX (1) bit is calculated on the assumption that a line carry-out bit from the second line consisting of the adder cells preceding the first line is 1 and the CX (0) bit is calculated on the assumption that the line carry-out bit from the second line is zero.

公开(公告)号：JP2001326830A

公开(公告)日：2001-11-22

申请号：JP2001085624

申请日：2001-03-23

Applicant: ST MICROELECTRONICS INC

Inventor： ELLIOT WILLIAM D ,  NEUGEBAUER CHARLES F

IPC: H04N5/12 ,  G09G3/20 ,  G09G5/00 ,  H03K5/00 ,  H03K5/1252 ,  H03K5/13 ,  H03L7/081 ,  H03L7/089 ,  H03L7/091

Abstract: PROBLEM TO BE SOLVED: To provide an enhanced system that employs a digital phase locked loop. SOLUTION: The system has a digital phase locked loop(PLL) consisting of a full digital circuit configuration and a standard cell structure. The digital PLL has a digital frequency synthesizer and a digital phase detector. The digital frequency synthesizer includes a digital DLL including digital chains, a non-glitch MUX and a phase accumulator. The digital phase detector is electrically coupled with the digital frequency synthesizer and supplies digital code information denoting a phase error between the edge of an input reference signal and the edge of a synthesized signal by comparing the edge of the input reference signal with the edge of the synthesized signal.

公开(公告)号：JP2001268138A

公开(公告)日：2001-09-28

申请号：JP2001028614

申请日：2001-02-05

Applicant: ST MICROELECTRONICS INC

Inventor： ZABRODA OLEKSIY

IPC: G05F3/26 ,  H03K19/0175 ,  H04L25/02

Abstract: PROBLEM TO BE SOLVED: To provide a line driver equipped with a self-controllable output impedance capable of decreasing power dispersion and improving power efficiency for implementation of an integrated circuit. SOLUTION: A pair of buffers are connected to the primary coil of a transformer in push-pull circuit, and a pair of pre-drivers are connected to the pair of buffers. A control circuit outputs a control signal to a controllable current source. The controllable current source is regulated by this control signal, and the output impedance of the buffer can be matched with the characteristic impedance of the transmission line connected to the secondary coil of the transformer.

公开(公告)号：JP2001250383A

公开(公告)日：2001-09-14

申请号：JP2001063625

申请日：2001-03-07

Applicant: ST MICROELECTRONICS INC

Inventor： LAURENT DUANE GILES ,  GURITZ ELMER HENRY ,  WORLEY JAMES LEON

IPC: G11C11/407 ,  G11C11/408

Abstract: PROBLEM TO BE SOLVED: To provide a technology for controlling a booststrap circuit for boosting a voltage level generated on a word line of a DRAM. SOLUTION: The booststrap circuit is enabled in a period succeeding to initial power-up of a sense amplifier of a memory device during a performing period of memory access operation, the time when voltage generated on a selected bit line intersects the prescribed voltage level is detected, after that, the bootstrap circuit is enabled. Thus, the prescribed period elapse between turning-on of the sense amplifier and activation of the bootstrap circuit, therefore, influence affected to operation of the bootstrap circuit by a noise introduced by turning on the sense amplifier is reduced.

公开(公告)号：JP2001229677A

公开(公告)日：2001-08-24

申请号：JP2000363386

申请日：2000-11-29

Applicant: ST MICROELECTRONICS INC

Inventor： CHAN TSIU CHIU

IPC: G11C11/41 ,  G11C11/412

Abstract: PROBLEM TO BE SOLVED: To provide a memory cell in which durability against radiation is improved. SOLUTION: A pair of word line accesses a memory cell so that any word line being enabled accesses data in a memory cell. The memory cell has two data storing cells. Each storing cell has a pair of transistors being cross-coupled, and these are cross-coupled to each other indirectly through a separation device. Each of two data storing cells is cross-coupled to each other, and enforces and keeps data in the data storing cell cross-coupled respectively. When data is in a dangerous state in one of data storing cells, the other storing cell keeps the data always at a correct level.

公开(公告)号：JP2001222706A

公开(公告)日：2001-08-17

申请号：JP2000398161

申请日：2000-12-27

Applicant: ST MICROELECTRONICS INC

Inventor： KRAMER ALAN

IPC: A61B5/117 ,  G06K9/00 ,  G06T1/00

Abstract: PROBLEM TO BE SOLVED: To provide an improved fingerprint pattern detection technique. SOLUTION: A fingerprint detection operation is carried out by applying voltage change to a user's body during a detection period.

公开(公告)号：JP2001211086A

公开(公告)日：2001-08-03

申请号：JP2000329735

申请日：2000-10-30

Applicant: ST MICROELECTRONICS INC

Inventor： YANG HONDA ,  GILL JOHN T III

IPC: G06F11/10 ,  G11B20/18 ,  H03M13/15 ,  H03M13/27 ,  H03M13/35

Abstract: PROBLEM TO BE SOLVED: To provide a technology for an interleave type error correcting code having a selective variable redundancy. SOLUTION: In this system and method, an extended type detecting signal is generated by the processing of Reed-Solomon operation regarding unassigned inspecting symbol which is not forming a part of an interleave type coding word. After decoding the coding word and identifying the uncorrectable errors in decoding, the detecting signal is decoded so as to recover the unassigned detecting signal corresponding with the coding word being uncorrectable at the previous time. The recovered unassigned detecting signal is added to the coding word being un-correctable at the previous time so as to enhance the error correcting ability. Then the coding word is decoded, that word is un- correctable before getting the recovered unassigned detecting signal, and also the errors in the decoded word are corrected.

公开(公告)号：JP2001169583A

公开(公告)日：2001-06-22

申请号：JP2000329004

申请日：2000-10-27

Applicant: ST MICROELECTRONICS INC

Inventor： PEDRAZZINI GIORGIO

IPC: G11B21/12 ,  G11B5/54 ,  G11B5/60 ,  G11B21/10 ,  G11B21/22 ,  H02P25/06 ,  H02P5/00 ,  G11B21/02

Abstract: PROBLEM TO BE SOLVED: To provide a technique for improving the control of the speed of read/write heads of a disk-drive device. SOLUTION: This ramp loading method and device controls the application of a drive current to a voice coil in a hard disk drive system. More specifically, a periodical waveform is modulated by either a signal and a reference level related to back electromotive force(BEMF) being stored in the voice coil. The drive current is applied to the voice coil during the time period being modulated by a signal related to the BEMF where the periodical waveform is stored. The amplitude and period of the drive current decrease as BEMF in the voice coil decreases. Therefore, the voice coil is controlled based on the BEMF, and gradually decreasing power is supplied since a head mechanism is moved closer to or away from a ramp assembly body.

公开(公告)号：JP2001160868A

公开(公告)日：2001-06-12

申请号：JP2000299402

申请日：2000-09-29

Applicant: ST MICROELECTRONICS INC

Inventor： VARELJIAN ALBERT

IPC: H04M1/58 ,  H04B1/52 ,  H04B1/58 ,  H04B3/03 ,  H04M11/00

Abstract: PROBLEM TO BE SOLVED: To provide a hybrid circuit for effectively communicating information through a communication line where a transmitter and a receiver are connected. SOLUTION: A main hybrid circuit is constituted as a filter for filtering a signal of a prescribed frequency, which appears at the output terminal of the transmitter and the communication line, at the input terminal of the receiver. The filter forms a capacitor divider for scaling the signal appearing at the output terminal of the transmitter and canceling the scaled signal with a related signal appearing on the communication line at the input terminal of the receiver. In one embodiment in communication using an ADSL protocol, the filter is a first-order high pass filter.

公开(公告)号：JP2001160815A

公开(公告)日：2001-06-12

申请号：JP2000301613

申请日：2000-10-02

Applicant: ST MICROELECTRONICS INC

Inventor： ANDREW M JONES ,  JOHN A CARY ,  HASEGAWA ATSUSHI

IPC: H04L5/22 ,  H04L12/28 ,  H04L12/56 ,  H04L12/66

Abstract: PROBLEM TO BE SOLVED: To provide a connection port whose function is enhanced in as integrated circuit. SOLUTION: The integrated circuit is provided with the connection port interconnecting a function module. The connection port provides functionality enhanced by a common port primitive (basic instruction). This simplifies the port design and the selection and allows a common packet protocol to be used for packet communication via a packet router.