公开(公告)号：WO2013176963A1

公开(公告)日：2013-11-28

申请号：PCT/US2013/041441

申请日：2013-05-16

Applicant: LUXVUE TECHNOLOGY CORPORATION

Inventor： GOLDA, Dariusz ,  BIBL, Andreas

IPC: H01L21/677 ,  B81C1/00 ,  B65G49/07

CPC classification number: B81C99/0025 ,  B81C2201/0194 ,  H01L21/67144 ,  H01L24/75 ,  H01L2224/7598

Abstract: A micro device transfer head array and method of forming a micro device transfer array from an SOI substrate are described. In an embodiment, the micro device transfer head array includes a base substrate and a patterned silicon layer over the base substrate. The patterned silicon layer may include a silicon interconnect and an array of silicon electrodes electrically connected with the silicon interconnect. Each silicon electrode includes a mesa structure protruding above the silicon interconnect. A dielectric layer covers a top surface of each mesa structure.

Abstract translation: 描述了从SOI衬底形成微器件传输阵列的微器件转移头阵列和方法。 在一个实施例中，微器件传送头阵列包括基底衬底和基底衬底上的图案化硅层。 图案化硅层可以包括硅互连和与硅互连电连接的硅电极阵列。 每个硅电极包括突出在硅互连上方的台面结构。 介电层覆盖每个台面结构的顶面。

公开(公告)号：WO2013126927A3

公开(公告)日：2013-11-21

申请号：PCT/US2013027826

申请日：2013-02-26

Applicant: SOLEXEL INC

Inventor： YONEHARA TAKAO ,  RANA VIRENDRA V ,  SEUTTER SEAN ,  MOSLEHI MEHRDAD M ,  TAMILMANI SUBRAMANIAN

IPC: H01L21/301 ,  B23K26/00 ,  H01L21/268

CPC classification number: H01L21/7813 ,  B23K26/0006 ,  B23K26/0054 ,  B23K26/0057 ,  B23K26/0093 ,  B23K26/0622 ,  B23K26/082 ,  B23K26/0869 ,  B23K26/244 ,  B23K26/702 ,  B23K2201/40 ,  B23K2203/52 ,  B42D25/00 ,  B81C1/0038 ,  B81C1/0088 ,  B81C2201/0192 ,  B81C2201/0194 ,  H01L21/268 ,  H01L21/304 ,  H01L21/76254 ,  H01L21/76259 ,  H01L25/0657 ,  H01L31/022441 ,  H01L31/0682 ,  H01L31/1892 ,  H01L33/0079 ,  H01L33/0095 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/49107 ,  H01L2224/73265 ,  H01L2924/13091 ,  H01L2924/1461 ,  Y02E10/547 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: Methods and systems are provided for the split and separation of a layer of desired thickness of crystalline semiconductor material containing optical, photovoltaic, electronic, micro-electro-mechanical system (MEMS), or optoelectronic devices, from a thicker donor wafer using laser irradiation.

Abstract translation: 提供的方法和系统用于使用激光照射从较厚的施主晶片分离和分离含有光学，光电，电子，微电子机械系统（MEMS）或光电子器件的期望厚度的结晶半导体材料的层。

公开(公告)号：WO2012148604A3

公开(公告)日：2012-12-20

申请号：PCT/US2012030286

申请日：2012-03-23

Applicant: CLEAN ENERGY LABS LLC ,  LACKOWSKI WILLIAM MARTIN ,  EVERETT WILLIAM NEIL ,  PINKERTON JOSEPH F

Inventor： LACKOWSKI WILLIAM MARTIN ,  EVERETT WILLIAM NEIL ,  PINKERTON JOSEPH F

IPC: B82B3/00 ,  B81C3/00 ,  B82Y15/00

CPC classification number: B82B3/0023 ,  B81B2201/018 ,  B81B2201/036 ,  B81B2203/0109 ,  B81B2207/053 ,  B81C3/001 ,  B81C2201/019 ,  B81C2201/0194 ,  B81C2203/036 ,  B81C2203/051 ,  G01L9/0042 ,  H01H1/0094

Abstract: The present invention relates to thin membranes (such as graphene windows) and methods of aligned transfer of such thin membranes to substrates. The present invention further relates to devices that include such thin membranes.

Abstract translation: 本发明涉及薄膜（如石墨烯窗）和将这种薄膜对准转移到基底的方法。 本发明还涉及包括这种薄膜的装置。

公开(公告)号：WO2012074363A1

公开(公告)日：2012-06-07

申请号：PCT/MY2011/000139

申请日：2011-06-23

Applicant: MIMOS BERHAD ,  DANIEL, Bien Chia Sheng ,  RAHIMAH, Mohd Saman ,  MUHAMAD RAMDZAN, Buyong ,  SITI AISHAH, Mohamad Badaruddin

Inventor： DANIEL, Bien Chia Sheng ,  RAHIMAH, Mohd Saman ,  MUHAMAD RAMDZAN, Buyong ,  SITI AISHAH, Mohamad Badaruddin

IPC: H01L21/20 ,  H01L21/311 ,  H01L21/58 ,  H01L21/306 ,  H01L21/318 ,  H01L21/31 ,  H01L21/3213

CPC classification number: H01L21/6835 ,  B81C1/00373 ,  B81C2201/0194 ,  H01L21/76256 ,  H01L27/1266 ,  H01L31/035218 ,  H01L31/1892 ,  H01L2221/68327 ,  H01L2221/6835 ,  H01L2221/68363 ,  Y02E10/50

Abstract: The present invention relates to a method of transferring a silicon based layer 101 a onto a polymer film 103 that comprises the steps of: preparing an initial substrate 105a; depositing a silicon-based layer 101 a on the initial substrate 105a; etching the silicon-based layer to form desired micro-nano structure; depositing a TiN layer 111 by RF sputtering; depositing a tungsten layer 109; etching back the tungsten layer 109 to form a planarised surface exposing the TiN layer 111 on the top of the silicon-based layer; removing the exposed portions of TiN 111 off the silicon-based layer 101a, thus forming a planarised surface comprising the silicon-based layer 101a with at least one tungsten plug 109 formed therein; coating a polymer film 103 onto the planarised surface; releasing the initial substrate 105a from the other layers; and removing the at least one tungsten plug 109 and TiN layer 111.

Abstract translation: 本发明涉及一种将硅基层101a转移到聚合物膜103上的方法，包括以下步骤：制备初始衬底105a; 在初始衬底105a上沉积硅基层101a; 蚀刻硅基层以形成所需的微纳米结构; 通过RF溅射沉积TiN层111; 沉积钨层109; 蚀刻钨层109以形成平坦的表面，暴露出硅基层顶部的TiN层111; 从硅基层101a除去TiN 111的暴露部分，从而形成包含硅基层101a的平面表面，其中形成有至少一个钨丝塞109; 将聚合物膜103涂覆到平坦的表面上; 从其他层释放初始衬底105a; 以及去除所述至少一个钨插件109和TiN层111。

公开(公告)号：WO1993021663A1

公开(公告)日：1993-10-28

申请号：PCT/US1993003244

申请日：1993-04-07

Applicant: GEORGIA TECH RESEARCH CORPORATION

Inventor： GEORGIA TECH RESEARCH CORPORATION ,  JOKERST, Nan, Marie ,  BROOKE, Martin, Anthony ,  ALLEN, Mark, George

IPC: H01L31/18

CPC classification number: H01S5/183 ,  B81C1/00373 ,  B81C2201/0188 ,  B81C2201/0194 ,  H01L21/2007 ,  H01L21/78 ,  H01L27/14643 ,  H01L27/14687 ,  H01L27/14694 ,  H01L33/0062 ,  H01L2221/68368 ,  H01S5/0215 ,  H01S5/0217

Abstract: Various novel lift-off and bonding processes (60, 80, 100) permit lift-off of thin film materials and devices (68), comprising InxGa1-xAsyP1-y where 0

Abstract translation: 各种新颖的剥离和粘合工艺（60,80,100）允许从其中0

公开(公告)号：US20180229235A1

公开(公告)日：2018-08-16

申请号：US15434043

申请日：2017-02-15

Applicant: International Business Machines Corporation

Inventor： Joshua T. Smith ,  Cornelia Tsang Yang ,  Benjamin H. Wunsch

IPC: B01L3/00 ,  B81B1/00 ,  B81C1/00

CPC classification number: B01L3/502707 ,  B01L3/502761 ,  B01L2200/0631 ,  B01L2200/0652 ,  B01L2200/12 ,  B01L2300/0816 ,  B01L2300/0887 ,  B01L2300/12 ,  B81B2201/058 ,  B81C1/00119 ,  B81C2201/0132 ,  B81C2201/0194 ,  B81C2203/036

Abstract: An apparatus for sorting macromolecules includes a first chip including a channel formed in a first side of the first chip and having at least one monolithic sorting structure for sorting macromolecules from the sample fluid. A first set of vias formed in the first chip has openings in a second side of the first chip, the sample fluid being provided to the sorting structure through the first set of vias. A second set of vias formed in the first chip has openings in the second side for receiving macromolecules in the sample fluid greater than or equal to a prescribed dimension sorted by the sorting structure. A third set of vias formed in the first chip has openings in the second side for receiving macromolecules in the sample fluid less than the prescribed dimension. The apparatus includes first and second seals covering the first and second sides, respectively.

公开(公告)号：US20180073854A1

公开(公告)日：2018-03-15

申请号：US15473956

申请日：2017-03-30

Applicant: International Business Machines Corporation

Inventor： HUAN HU ,  NING LI ,  XIAO HU LIU ,  KATSUYUKI SAKUMA

IPC: G01B7/16

CPC classification number: G01B7/20 ,  B81B3/0097 ,  B81B2201/0214 ,  B81B2207/07 ,  B81C1/0038 ,  B81C2201/0194 ,  G01L1/2293

Abstract: Aspects include a method of manufacturing a flexible electronic structure that includes a metal or doped silicon substrate. Aspects include depositing an insulating layer on a silicon substrate. Aspects also include patterning a metal on a silicon substrate. Aspects also include selectively masking the structure to expose the metal and a portion of the silicon substrate. Aspects also include depositing a conductive layer including a conductive metal on the structure. Aspects also include plating the conductive material on the structure. Aspects also include spalling the structure.

公开(公告)号：US09550360B2

公开(公告)日：2017-01-24

申请号：US14926567

申请日：2015-10-29

Applicant: NLT Technologies, Ltd.

Inventor： Shigeru Mori ,  Setsuo Kaneko ,  Hideki Asada

IPC: B41J2/16 ,  B41J2/14 ,  B41J2/045 ,  C09K13/00 ,  B81C1/00

CPC classification number: B41J2/1601 ,  B41J2/0455 ,  B41J2/0458 ,  B41J2/14016 ,  B41J2/14129 ,  B41J2/1626 ,  B41J2/1634 ,  B41J2002/14387 ,  B81C1/00357 ,  B81C1/00817 ,  B81C2201/0194 ,  C09K13/00

Abstract: Provided are a manufacturing method of an inkjet print head, the inkjet print head and a drawing apparatus equipped with the inkjet print head. The manufacturing method includes: forming a separation assisting layer on a substrate; forming heating resistors, thin-film transistors and nozzles for ejecting liquid, on the separation assisting layer; separating the separation assisting layer from the substrate; forming a first heat-conductive layer on the opposite surface of the separation assisting layer from the nozzles; and forming an ink supply port for supplying ink to the nozzles from a first heat-conductive layer side of the inkjet print head.

Abstract translation: 提供了一种喷墨打印头，喷墨打印头和装备有喷墨打印头的绘图装置的制造方法。 该制造方法包括：在基板上形成分离辅助层; 在分离辅助层上形成用于喷射液体的加热电阻器，薄膜晶体管和喷嘴; 从所述基板分离所述分离辅助层; 在所述分离辅助层的与所述喷嘴相反的表面上形成第一导热层; 以及形成用于从喷墨打印头的第一导热层侧向喷嘴供墨的供墨口。

公开(公告)号：US20160380404A1

公开(公告)日：2016-12-29

申请号：US15140282

申请日：2016-04-27

Applicant: MASSACHUSETTS INSTITUTE OF TECHNOLOGY

Inventor： Vladimir BULOVIC ,  Jeffrey Hastings LANG ,  Apoorva MURARKA ,  Annie I-Jen WANG ,  Wendi CHANG

IPC: H01S3/105 ,  H01S3/0933 ,  G01L1/24 ,  H01S3/16 ,  B81C1/00 ,  H01S3/08 ,  H01S3/094

CPC classification number: H01S3/1053 ,  B81B2201/02 ,  B81B2201/042 ,  B81C1/00158 ,  B81C1/00634 ,  B81C2201/0194 ,  G01L1/24 ,  G01L9/0005 ,  G01L9/0072 ,  G01L11/02 ,  G02B26/001 ,  H01L29/84 ,  H01S3/07 ,  H01S3/08059 ,  H01S3/0933 ,  H01S3/094 ,  H01S3/0941 ,  H01S3/106 ,  H01S3/1305 ,  H01S3/16 ,  H01S3/1693

Abstract: The disclosure relates to method and apparatus for micro-contact printing of micro-electromechanical systems (“MEMS”) in a solvent-free environment. The disclosed embodiments enable forming a composite membrane over a parylene layer and transferring the composite structure to a receiving structure to form one or more microcavities covered by the composite membrane. The parylene film may have a thickness in the range of about 100 nm-2 microns; 100 nm-1 micron, 200-300 nm, 300-500 nm, 500 nm to 1 micron and 1-30 microns. Next, one or more secondary layers are formed over the parylene to create a composite membrane. The composite membrane may have a thickness of about 100 nm to 700 nm to several microns. The composite membrane's deflection in response to external forces can be measured to provide a contact-less detector. Conversely, the composite membrane may be actuated using an external bias to cause deflection commensurate with the applied bias. Applications of the disclosed embodiments include tunable lasers, microphones, microspeakers, remotely-activated contact-less pressure sensors and the like.

公开(公告)号：US20160311679A1

公开(公告)日：2016-10-27

申请号：US15138313

申请日：2016-04-26

Applicant: Infineon Technologies AG

Inventor： Dominic Maier ,  Alfons Dehe ,  Thomas Kilger ,  Markus Menath ,  Franz Xaver Muehlbauer ,  Daniel Porwol ,  Juergen Wagner

IPC: B81C1/00 ,  B81B7/00

CPC classification number: B81C1/00896 ,  B81C1/00269 ,  B81C1/00801 ,  B81C2201/0194 ,  B81C2201/053

Abstract: A method of producing a chip package is described. A plurality of chips is provided on a first wafer. Each chip has a cavity which opens to a first main face of the chip. The cavities are filled or covered temporarily. The chips are then singulated. The singulated chips are embedded in an encapsulation material, and then the cavities are re-exposed.

Abstract translation: 对芯片封装的制造方法进行说明。 多个芯片设置在第一晶片上。 每个芯片具有通向芯片的第一主面的空腔。 空腔被暂时填充或覆盖。 然后将芯片分开。 单片化芯片嵌入封装材料中，然后将空腔重新曝光。