PRINTED WIRING BOARD AND PRINTED CIRCUIT BOARD
    131.
    发明申请
    PRINTED WIRING BOARD AND PRINTED CIRCUIT BOARD 审中-公开
    印刷线路板和印刷电路板

    公开(公告)号:WO2014080963A1

    公开(公告)日:2014-05-30

    申请号:PCT/JP2013/081333

    申请日:2013-11-14

    Abstract: A main wire 111 has inner layer wiring patterns 161 to 165 which are wired on an inner layers 114 and 115 connected by via conductors 166 to 169 in series. In addition, a main wire 112 has inner layer wiring patterns 181 to 185 which are wired on the inner layers 114 and 115 connected by via conductors 186 to 189. The inner layer wiring patterns 161 to 165 and the inner layer wiring patterns 181 to 185 are wired so as to change the layer to the inner layer on the opposite side to each other. Branch wires 121 1 to 121 4 and 122 1 to 122 4 are branched from the via conductors 166 to 169 and 186 to 189, respectively. Thereby, the present invention provides an inexpensive printed wiring board which can reduce ringing without upsizing the printed wiring board.

    Abstract translation: 主导线111具有布线在通过导体166至169串联连接的内层114和115上的内层布线图案161至165。 此外,主导线112具有布线在通过导体186至189连接的内层114和115上的内层布线图案181至185.内层布线图案161至165和内层布线图案181至185 被布线以将层改变成彼此相对侧上的内层。 分支线1211至1214和1221至1224分别从通孔导体166至169和186至189分支。 因此,本发明提供了一种廉价的印刷布线板,其可以在不使印刷线路板增大的情况下减少振铃。

    構造体、電子装置、及び配線基板
    132.
    发明申请
    構造体、電子装置、及び配線基板 审中-公开
    结构,电子设备和接线板

    公开(公告)号:WO2010044276A1

    公开(公告)日:2010-04-22

    申请号:PCT/JP2009/005423

    申请日:2009-10-16

    Inventor: 小林直樹

    Abstract:  構造体(100)の単位セル(106)は、複数の第1導体(2)、第2導体(1)、第3導体(3)、及び複数の接続用導体(4)を備えている。第1導体(2)は、第1の層(20)に位置し、互いに分離している。第2導体(1)は、第1の層(20)とは異なる第2の層(10)に位置しており、複数の第1導体(2)に対向する領域に少なくとも一部が設けられている。第3導体(3)は、第1の層(20)を介して第2の層(10)とは逆側に位置する第3の層(30)に位置しており、平面視において互いに隣り合う複数の第1導体(2)それぞれと重なるように配置されている。接続用導体(4)は、第3導体(3)を、平面視においてその第3導体(3)と重なっている複数の第1導体(2)に接続する。

    Abstract translation: 公开了具有设置有多个第一导体(2),第二导体(1),第三导体(3)和多个连接导体(4)的单元电池(106)的结构(100)。 第一导体(2)彼此分开设置在第一层(20)上。 设置在与第一层(20)不同的第二层(10)上的第二导体(1)的至少一部分跨越与多个第一导体(2)相对的区域。 设置在位于与第二层(10)相对的第二层(10)的第三层(30)上的第三导体(3)以第一层(20)插入的方式设置成覆盖每个 在平面图中相互相邻的多个第一导体(2)。 在平面图中,连接导体(4)将第三导体(3)连接到覆盖在第三导体(3)上的多个第一导体(2)。

    METHOD FOR FABRICATING CLOSED VIAS IN A PRINTED CIRCUIT BOARD
    133.
    发明申请
    METHOD FOR FABRICATING CLOSED VIAS IN A PRINTED CIRCUIT BOARD 审中-公开
    在印刷电路板上制造封闭VIAS的方法

    公开(公告)号:WO2008057717A3

    公开(公告)日:2008-07-31

    申请号:PCT/US2007081343

    申请日:2007-10-15

    Abstract: A method for forming closed vies In a mgtfflayßr printed circuit board. A dielectric layer Is laminated to one side of a central. core having a metal layer on each side. A second dielectric layer is laminated to the other side of the central core. Closed vtas In the central core have been formed by drilling partially through but not completely penetrating the central core, and then completing the via from the opposite side with a hole that Is much smaller In diameter to form a pathway that penetrates completely through the central core from one side to another. The via is then plated with metal to substantially close the smaller hols. Approximately one half of the closed vlas are situated such that the closed aperture faces one dielectric layer and a remainder of the dosed vias are situated such that the closed aperture faces the other dielectric layer.

    Abstract translation: 一种在mgtfflayßr印刷电路板上形成闭合点的方法。 电介质层被层压到中央的一侧。 核心在每侧具有金属层。 第二介电层被层压到中央芯的另一侧。 在中央核心已形成部分穿过,但不是完全穿透中央核心,然后完成通孔从另一侧有一个小得多的直径,以形成完全穿透中央核心的通道 从一边到另一边。 然后通孔镀上金属以基本上封闭较小的玻璃管。 大约一半的封闭瓦片的位置使得封闭孔隙面向一个介电层并且其余的配料过孔的位置使得封闭孔隙面向另一个介电层。

    METHOD FOR FABRICATING CLOSED VIAS IN A PRINTED CIRCUIT BOARD
    134.
    发明申请
    METHOD FOR FABRICATING CLOSED VIAS IN A PRINTED CIRCUIT BOARD 审中-公开
    在印刷电路板上制作封闭VIAS的方法

    公开(公告)号:WO2008057717A2

    公开(公告)日:2008-05-15

    申请号:PCT/US2007/081343

    申请日:2007-10-15

    Abstract: A method for forming closed vias in a multilayer printed circuit board. A dielectric layer (1085) is laminated to one side of a central core having a metal layer (120, 130) on each side. A second dielectric layer (1080) is laminated to the other side of the central core. Closed vias in the central core have been formed by drilling partially through but not completely penetrating the central core, and then completing the via from the opposite side with a hole that is much smaller in diameter to form a pathway that penetrates completely through the central core from one side to another. The via is then plated with metal to substantially close the smaller hole. Approximately one half of the closed vias are situated such that the closed aperture (355) faces one dielectric layer and a remainder of the closed vias are situated such that the closed aperture (350) faces the other dielectric layer. Resin from one dielectric layer (1085) fills the cavities of approximately one half of the closed vias, and resin from the other dielectric layer (1080) fills the circular cavities of the remainder of the closed vias. The total amount of resin migrated from each of the dielectric layers into the closed via cavities is approximately equal.

    Abstract translation: 一种在多层印刷电路板中形成封闭通孔的方法。 电介质层(1085)被层压到每侧具有金属层(120,130)的中心芯的一侧。 第二电介质层(1080)层压到中心芯的另一侧。 已经通过部分地穿过但不完全穿透中心芯而形成中心芯上的闭合的通孔,然后通过直径小得多的孔从相对侧完成通孔,以形成完全穿透中心芯的通路 从一边到另一边。 然后通孔用金属电镀以基本上闭合较小的孔。 闭合通孔的大约一半被定位成使得闭合孔(355)面向一个电介质层,并且其余的封闭通孔被定位成使得闭合孔(350)面向另一介电层。 来自一个电介质层(1085)的树脂填充了大约一半的封闭通孔的空腔,并且来自另一介电层(1080)的树脂填充了其余的封闭通孔的圆形空腔。 从每个介电层迁移到封闭通孔中的树脂的总量近似相等。

    ELECTRICAL CONNECTOR
    137.
    发明申请
    ELECTRICAL CONNECTOR 审中-公开
    电气连接器

    公开(公告)号:WO2003030308A1

    公开(公告)日:2003-04-10

    申请号:PCT/GB2002/004385

    申请日:2002-09-27

    Abstract: The electrical connector has a multilevel printed circuit board (42) connecting between two sets of terminals. For example, one set of terminals is a set of insulation displacement contacts (14) and the other is a set of tails (16) for connecting to a plug inserted into a socket (26). Tracks on the printed circuit board (42) connect between respective terminals (14, 16). Signals are assigned to particular pairs signal paths through pairs of terminals and tracks. The multilevel printed circuit board (42) includes coupling regions coupling between tracks to compensate for crosstalk between the pains.

    Abstract translation: 电连接器具有连接两组端子之间的多层印刷电路板(42)。 例如,一组端子是一组绝缘位移触头(14),另一组是用于连接到插入插座(26)中的插头的一组尾部(16)。 印刷电路板(42)上的轨迹在相应的端子(14,16)之间连接。 信号通过成对的终端和轨道被分配给特定的对信号路径。 多层印刷电路板(42)包括在轨道之间耦合的耦合区域以补偿疼痛之间的串扰。

    CROSSTALK REDUCTION IN CONSTRAINED WIRING ASSEMBLIES
    138.
    发明申请
    CROSSTALK REDUCTION IN CONSTRAINED WIRING ASSEMBLIES 审中-公开
    约束式接线装置中的减速器

    公开(公告)号:WO02025833A2

    公开(公告)日:2002-03-28

    申请号:PCT/US2001/042306

    申请日:2001-09-19

    CPC classification number: H04B3/32 H05K1/0228 H05K1/0245 H05K2201/097

    Abstract: A wiring apparatus for reducing electromagnetic interference between conductive wires is provided. Wire pairs are incorporated into rigid or flexible printed circuits to precisely control loop alignment and phase differences. This precise alignment helps to cancel radiated electromagnetic fields and reduce voltage polarities induced in nearby wires. In one embodiment, a pair of parallel wires is aligned parallel to a second, twisted pair of wires. In another embodiment, two twisted pairs of wires, with identical loop lengths, are aligned parallel to each other and offset by exactly one half loop length. In a third embodiment, two twisted pairs of wires are aligned parallel to each other, in which one pair has a loop length that is an integer ratio of the other pair.

    Abstract translation: 提供一种用于降低导线之间的电磁干扰的布线装置。 电线对被结合到刚性或柔性印刷电路中,以精确地控制环路对准和相位差。 这种精确对准有助于消除辐射电磁场并减少附近电线中感应的电压极性。 在一个实施例中,一对平行线平行于第二双绞线对排列。 在另一个实施例中,具有相同环路长度的两条双绞线对彼此平行排列并偏移正好一个半环长度。 在第三实施例中,两条双绞线彼此平行排列,其中一对具有作为另一对的整数比的环长度。

    A METHOD AND APPARATUS FOR INTERCONNECTING MULTIPLE DEVICES ON A CIRCUIT BOARD
    139.
    发明申请
    A METHOD AND APPARATUS FOR INTERCONNECTING MULTIPLE DEVICES ON A CIRCUIT BOARD 审中-公开
    一种用于在电路板上互连多个器件的方法和装置

    公开(公告)号:WO00079850A1

    公开(公告)日:2000-12-28

    申请号:PCT/US2000/014960

    申请日:2000-05-25

    Abstract: A method and apparatus interconnecting multiple devices on a circuit board. One disclosed circuit board (200) has a first attach region on a first surface for coupling a first set of pins from a first device (205, 210, 215) to a set of signal lines. A second attach region on a second surface is for coupling a second set of pins from a second device (220, 225) to the set of signal lines. The second attach region is predominantly non-overlapping with respect to the first attach region.

    Abstract translation: 一种将电路板上的多个设备互连的方法和装置。 一个公开的电路板(200)在第一表面上具有第一连接区域,用于将第一组引脚从第一设备(205,210,215)耦合到一组信号线。 第二表面上的第二连接区域用于将第二组引脚从第二设备(220,225)耦合到所述信号线集合。 第二附着区域相对于第一附着区域主要是不重叠的。

    A HORIZONTALLY TWISTED-PAIR PLANAR CONDUCTOR LINE STRUCTURE
    140.
    发明申请
    A HORIZONTALLY TWISTED-PAIR PLANAR CONDUCTOR LINE STRUCTURE 审中-公开
    一种水平对绞平面导线结构

    公开(公告)号:WO1995006946A1

    公开(公告)日:1995-03-09

    申请号:PCT/US1994010004

    申请日:1994-08-31

    Applicant: MOTOROLA INC.

    Abstract: A twisted-pair conductor line structure is formed on a substrate (22) having insulated conductive layers (10, 11). The conductive layers are used to form first, second, third, and fourth conductive planar segments (16). A first conductive link (17) joins the first and second planar conductive segments to provide a first signal path. Similarly, a second conductive link (17) joins the third and fourth planar conductive segments to provide a second signal path. The first and second conductive links are operatively arranged to form a twist (17) in the first and second signal paths, such that the resulting magnetic fields (57, 59) around the twisted conductive segments will be opposite to each other for cancelling each other out, in order to reduce the magnetic field radiation to the surrounding environment.

    Abstract translation: 在具有绝缘导电层(10,11)的基板(22)上形成双绞导体线结构。 导电层用于形成第一,第二,第三和第四导电平面段(16)。 第一导电连接(17)连接第一和第二平面导电段以提供第一信号路径。 类似地,第二导电连接(17)连接第三和第四平面导电段以提供第二信号路径。 第一和第二导电连接件被可操作地布置成在第一和第二信号路径中形成扭转(17),使得围绕扭转的导电段的所得到的磁场(57,59)将彼此相对以抵消彼此 出来,以减少对周围环境的磁场辐射。

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