AMPLITUDE ADJUSTMENT DEVICE, AMPLITUDE COMPRESSOR AND AMPLITUDE EXPANDER

    公开(公告)号:JP2000022472A

    公开(公告)日:2000-01-21

    申请号:JP18086498

    申请日:1998-06-26

    Applicant: YAMAHA CORP

    Abstract: PROBLEM TO BE SOLVED: To provide an amplitude compressor that is easily integrated into an IC in a MOS process. SOLUTION: When an input signal Vin is fed to a PWM modulation section 10, the input signal Vin is PWM-modulated depending on a modulation degree decided by a control signal Cs and a PWM modulation signal Vm is generated. An amplitude detection section 30 detects an amplitude of an output signal Vout based on a signal V' that is an inverse of the PWM modulation signal Vm to generate the control signal Cs in response to the detection result. Since the control signal Cs is given as positive and negative power supplies vh, vl of a buffer 13, a feedback amount of an operational amplifier 11 is adjusted thereby to adjust a modulation degree of the PWM modulation signal Vm. A demodulation section 20 demodulates the PWM modulation signal Vm to generate the output signal Vout.

    VARIABLE RESISTOR DEVICE
    142.
    发明专利

    公开(公告)号:JP2000004133A

    公开(公告)日:2000-01-07

    申请号:JP16758998

    申请日:1998-06-15

    Applicant: YAMAHA CORP

    Abstract: PROBLEM TO BE SOLVED: To provide the variable resistor device which may be small in circuit area and is surely operated even with a low voltage. SOLUTION: When an input signal Vin is converted by a resistor Rin into a current to supply an input current ΔiO, a current iO flows to a P-channel FET P0 and a current iO+ΔiO flows to an N-channel FET N0. When control data Dc is supplied to a decoder DEC, control signals ϕ1 to ϕn are generated to control the operation of respective current output parts with them. For example, when the control signal ϕ1 is at a high level, a P-channel FET P1 and an N-channel FET N1 are turned on and a current S1.ΔiO is sucked from an output resistance Rout. Here, S1 is the size ratio of these transistors. Therefore, an output current ΔiL corresponding to the size ratio of the transistors can be taken out by supplying the control signal ϕ1 to ϕn.

    A/D CONVERTER
    143.
    发明专利

    公开(公告)号:JPH11163731A

    公开(公告)日:1999-06-18

    申请号:JP32639197

    申请日:1997-11-27

    Applicant: YAMAHA CORP

    Abstract: PROBLEM TO BE SOLVED: To extend the dynamic range of a ΔΣtype A/D converter, with a simple configuration. SOLUTION: A moving average calculation section 210 calculates a moving average of bit stream data D generated by a 1-bit A/D converter. Moving average data D' indicate a peak value of an input analog signal. A maximum value detection section 220 generates an attenuation control signal C1 by detecting a maximum value of the moving average data D' exceeding a first threshold level. Then the maximum value is stored in a maximum value latch register 230. A discrimination circuit 240 makes access to the maximum value latch register 230 and detects the maximum value being lower than second threshold consecutively for a prescribed time, then the circuit 240 generates an increase control signal C2.

    PHASE SHIFTING CIRCUIT
    144.
    发明专利

    公开(公告)号:JPH11136091A

    公开(公告)日:1999-05-21

    申请号:JP30133097

    申请日:1997-10-31

    Applicant: YAMAHA CORP

    Abstract: PROBLEM TO BE SOLVED: To provide a phase shifting circuit which is small in the number of elements and inexpensive and can make a phase shift of 0 to -2 π. SOLUTION: A current operational amplifier 12 outputs an output current 3I which is three times as large as an input current and an output current -2I which is -2 times. The time constant current constituted by connecting a resistance 21 and a capacitor 22 in series supplies part of the output current 31 to the ground side and a resistance 23 leads the remaining current which does not flow to the time constant current to an output terminal 40. Further, a capacitor 31 supplies part of the output current -2I to the ground side and a resistance 32 leads the remaining current which does not flow to this capacitor 31 to the output terminal 40. The resistance 23 has a resistance value which is twice as large as that of the resistance 21 and the time constant based upon the capacitor 31 and resistance 32 is much smaller than the time constant based upon the resistance 21 and capacitor 22.

    ACTIVE FILTER AND INTEGRATED CIRCUIT FOR ACTIVE FILTER

    公开(公告)号:JPH11136090A

    公开(公告)日:1999-05-21

    申请号:JP30132997

    申请日:1997-10-31

    Applicant: YAMAHA CORP

    Abstract: PROBLEM TO BE SOLVED: To obtain an active filter which has the same transfer function with a conventional article and a less number of pins for connecting external impedance than the conventional article. SOLUTION: A current operational amplifier 1 has its inverted input terminal (-) virtually grounded and supplies a current which is equal to the input current passed through a resistance 11 from its uninverted input terminal (+) to an external capacitor 21. The current which corresponds to the output voltage of the current operational amplifier 1 flows to the resistance 12 and the same current as it is fed from the uninverted output terminal (+) of the current operational amplifier 1 back to the output terminal of the current operational amplifier 1. Further, a current having the opposite polarity from that of the uninverted output terminal (+) is outputted from the inverted output terminal (-) of the current operational amplifier 2 and flows to the parallel connection of an external resistance 17, an external capacitor 22, and a feedback resistance 16. Consequently, the output signal of a biquad filter is obtained from the inverted input terminal (-) of the current operational amplifier 2.

    DRIVING CIRCUIT
    146.
    发明专利

    公开(公告)号:JPH10163846A

    公开(公告)日:1998-06-19

    申请号:JP31972096

    申请日:1996-11-29

    Applicant: YAMAHA CORP

    Inventor: NORO MASAO

    Abstract: PROBLEM TO BE SOLVED: To provide a driving circuit which can surely perform the voltage feedback control even with use of the power voltage of a low level and is useful to an S/T point driver, etc., by using both differential amplifier circuits which are selectively activated and inactivated by a switch circuit and without using any transfer gate for the feedback control of the output voltage. SOLUTION: When the transistors TR N2 and N3 are simultaneously turned on and driven, the output voltage is generated at an output node A. Then the output of a NAND gate G1 is set at L and the TR P31 and P32 of a switch circuit 5 are turned on and off respectively. As a result, a differential amplifier circuit 2a is activated and the voltage of the node A is applied. A TR N7 is controlled by the output and the feedback control is carried out to set the output voltage at the reference voltage Vref. When the TR N1 and N4 are turned on and driven, the output of a NAND gate G2 is set at L. Then a differential amplifier circuit 2b is activated and the feedback control is carried out for the output voltage of an output node B. As a result, the feedback control of the output voltage is never disturbed even with use of the power voltage of a low level.

    SOUND FIELD EXPANSION DEVICE
    147.
    发明专利

    公开(公告)号:JPH10108299A

    公开(公告)日:1998-04-24

    申请号:JP25649696

    申请日:1996-09-27

    Applicant: YAMAHA CORP

    Abstract: PROBLEM TO BE SOLVED: To provide a sound field expansion device which readily lenders itself to an LSI circuit and whose amplitude and phase characteristics are switched. SOLUTION: The connection state of capacitors 10, 20, 50, 60 is switched by 1st and 2nd switch groups. Thus, the switched capacitors are constituted. Then the capacitors 10, 20, 50, 60 act equivalently as resistors. In this case, the phase amplitude characteristic of the circuit depends on a capacitance ratio of the capacitors 10, 20, 50, 60 and a clock frequency supplied to the 1st and 2nd switch groups. Thus, capacitance values C1-C6 of the capacitors C10-C60 are suppressed low and a large scale integrated circuit is adopted for the sound field expansion device.

    AMPLIFIER CIRCUIT
    148.
    发明专利

    公开(公告)号:JPH1098339A

    公开(公告)日:1998-04-14

    申请号:JP24836796

    申请日:1996-09-19

    Applicant: YAMAHA CORP

    Inventor: NORO MASAO

    Abstract: PROBLEM TO BE SOLVED: To provide an amplifier circuit obtaining an output, without the distortion of a waveform by perfectly symmetrical push/pull operation. SOLUTION: Through the use of the first and second transistors Q11 and Q 12 of npn-type, a first DC power source E11 is connected between the collector of the first transistor Q11 and the emitter of the second transistor Q12 and a second DC power source E12 is connected between the collector of the second transistor Q12 and the emitter of the first transistor Q11. An AC input signal is supplied between the respective base and emitter of the first and second transistors Q11 and Q12 as mutually reverse phase signal sources S11 and S12, and a load RL 11 is connected between the collectors or between the emitters of the first and second transistors Q11 and Q12 so as to allow the first and second transistors Q11 and Q12 to push-pull operate.

    149.
    发明专利
    失效

    公开(公告)号:JP2522128B2

    公开(公告)日:1996-08-07

    申请号:JP27336291

    申请日:1991-09-25

    Applicant: YAMAHA CORP

    Inventor: NORO MASAO

    A/D CONVERTER CIRCUIT
    150.
    发明专利

    公开(公告)号:JPH08102676A

    公开(公告)日:1996-04-16

    申请号:JP26192794

    申请日:1994-09-30

    Applicant: YAMAHA CORP

    Abstract: PURPOSE: To obtain a ΔΣ modulation type A/D converter circuit capable of effectively reducing noises by removing the influence of a clip. CONSTITUTION: A ΔΣ modulator 11 converts an input analog signal into a serial bit signal string and gain is restricted so that the maximum value of the input analog signal becomes 1/A feedback reference voltage. The serial bit signal string outputted from the modulator 11 is inputted to a digital filter 15 and a low frequency component corresponding to the input analog signal is extracted and converted into parallel bit digital data. The output from the filter 15 is inputted to a high pass filter(HPF) 16 and a DC offset is removed. A multiplier circuit 17 multiplies the output from the HPF 16 by gain A.

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