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    SEMICONDUCTOR PACKAGE AND FORMING METHOD THEREOF
    152.
    发明专利
    SEMICONDUCTOR PACKAGE AND FORMING METHOD THEREOF 失效

    公开(公告)号：JPH11297729A

    公开(公告)日：1999-10-29

    申请号：JP5446999

    申请日：1999-03-02

    Applicant: MOTOROLA INC

    Inventor： CHEW CHEE HIONG ,  CULBERTSON DAVE ,  TAN CHONG HOCK

    IPC: H01L21/56 ,  H01L23/48 ,  H01L23/495

    Abstract: PROBLEM TO BE SOLVED: To increase the number of semiconductor dies to be sealed per unit time by arranged the die between the flag part of a first lead frame and the lead part of a second lead frame, forming electrical connections and sealing the die in a molding material, thereby enhancing the rate of operation. SOLUTION: Welded flag frame and clip frame are subjected to reflow soldering process, and solder pools are fused between a semiconductor die 30 and a flag part 7 and between a lead part 19 and a pad position on the die 30. After reflow, the die 30, the flag part 7 and the pair of lead parts 19 are sealed by transfer molding, for example, for forming a semiconductor package. Finally, individual semiconductor packages are separated from the flag frame and the clip frame. Since this method employs only single-pick place step and single- reflow process, high speed package process can be realized.

    HIGH DENSITY FLEXIBLE CIRCUIT ELEMENT AND COMMUNICATION APPARATUS EMPLOYING IT
    153.
    发明专利
    HIGH DENSITY FLEXIBLE CIRCUIT ELEMENT AND COMMUNICATION APPARATUS EMPLOYING IT 失效

    公开(公告)号：JPH11289134A

    公开(公告)日：1999-10-19

    申请号：JP28663498

    申请日：1998-10-08

    Applicant: MOTOROLA INC

    Inventor： STEVEN C EMMERT

    IPC: H01R35/02 ,  H04M1/02 ,  H05K1/02 ,  H05K1/11 ,  H05K1/14

    Abstract: PROBLEM TO BE SOLVED: To provide a flexible circuit element suitable for reducing the size of an electronic apparatus by minimizing the flexible width. SOLUTION: A flexible circuit element being laid between the upper and lower housings 102, 108 in an electronic apparatus, e.g. a wireless telephone, includes an end in a tab 2712 separated from the edge of a flex strip and oriented at some angle from the wiring direction of trace. Since the flex width is minimized, the flex can be laid through an opening of minimum size and the size of the electronic apparatus can be minimized.

    Computer system provided with interface between memory and peripheral equipment and method for selecting communication parameter set
    155.
    发明专利
    Computer system provided with interface between memory and peripheral equipment and method for selecting communication parameter set 有权
    存储器和外围设备之间的接口提供的计算机系统和选择通信参数集的方法

    公开(公告)号：JPH11272599A

    公开(公告)日：1999-10-08

    申请号：JP499499

    申请日：1999-01-12

    Applicant: Motorola Inc ,  モトローラ・インコーポレイテッド

    Inventor： EZURA BARUCHI ,  YARON GOLD ,  SANJEI WANKUU ,  MOYER WILLIAM C

    IPC: G06F13/10 ,  G06F13/12

    CPC classification number: G06F13/124

    Abstract: PROBLEM TO BE SOLVED: To offer service for plural peripheral equipments for which different parameters are required by a single queue.
    SOLUTION: A computer system 100 is constituted of a processor 110, a memory 300, an interface 101 and the peripheral equipments 120-1, 120-2, 120-3. The interface is provided with a pointer generator 160, a port 150, a decoder 170 and a parameter register 180. A data word D(k) 380-k is transmitted from the memory 300 to the peripheral equipments 120-1, 120-2 120-3 by the port 150. Or the converse is performed. Communication parameters are stored in a parameter field 185-m of the parameter register 180 as a parameter set {P
    m }. A parameter set {P
    i } is selected by using a control word C(k) to be stored in the memory 300 by the decoder 170. Data queue is simultaneously transmitted to two or more peripheral equipments 120-1, 120-2, 120-3.
    COPYRIGHT: (C)1999,JPO

    Abstract translation: 要解决的问题：为单个队列需要不同参数的多个周边设备提供服务。 解决方案：计算机系统100由处理器110，存储器300，接口101和外围设备120-1,120-2,120-3构成。 接口设置有指针生成器160，端口150，解码器170和参数寄存器180.数据字D（k）380-k从存储器300发送到外围设备120-1,120-2 120-3由端口150.或者相反。 通信参数作为参数集Pm}存储在参数寄存器180的参数字段185-m中。 通过使用由解码器170存储在存储器300中的控制字C（k）来选择参数集Pi}。数据队列同时发送到两个或更多个外围设备120-1,120-2,120-3 。

    CIRCUIT AND METHOD FOR STORING DATA IN DRAM BUILT IN PORTABLE ELECTRONIC INSTRUMENT
    156.
    发明专利
    CIRCUIT AND METHOD FOR STORING DATA IN DRAM BUILT IN PORTABLE ELECTRONIC INSTRUMENT 失效

    公开(公告)号：JPH11265311A

    公开(公告)日：1999-09-28

    申请号：JP30286198

    申请日：1998-10-23

    Applicant: MOTOROLA INC

    Inventor： SNOWDEN RALPH ,  REED WENDY ,  ZOERNER GLEN JAMES ,  KWAN WAI-KIN STEVEN ,  CHU ON KI ANDREW ,  YIU HING LEUNG

    IPC: G06F1/24 ,  G06F12/00 ,  G11C11/406

    Abstract: PROBLEM TO BE SOLVED: To provide a circuit for storing data in a dynamic random access memory(DRAM) during the period of a reset state. SOLUTION: When an external reset signal EXRST received by a reset unit 6 is asserted, an internal reset signal INRST is generated by synchronizing the signal EXRST with an internal clock and impresses the signal INRST to a CPU 4 and other modules in the circuit to reset those. During the impression of the signal INRST to the CPU 4, the rate of a refresh signal generated by a DRAM controller 7 is raised in order to refresh data stored in the DRAM 3. When the signal EXRST is disabled, a delay reset signal DLYRST is generated and impressed to the controller 7 to reset the controller 7. Since the CPU 4 has been already reset, the controller 7 is immediately reconstituted and enabled again so as to restart the refresh of the DRAM 3 so that the data in the DRAM 3 can be maintained.

    COMMUNICATIONS DEVICE AND METHOD FOR INTERFERENCE SUPPRESSION IN DS-CDMA SYSTEM
    157.
    发明专利
    COMMUNICATIONS DEVICE AND METHOD FOR INTERFERENCE SUPPRESSION IN DS-CDMA SYSTEM 失效

    公开(公告)号：JPH11261531A

    公开(公告)日：1999-09-24

    申请号：JP36899098

    申请日：1998-12-25

    Applicant: MOTOROLA INC

    Inventor： MADHOW UPAMANYU ,  FRANK COLIN D ,  RASKY PHILLIP D

    IPC: H03M7/30 ,  G06F17/14 ,  H04B1/10 ,  H04B1/707 ,  H04B1/7107 ,  H04B1/7115 ,  H04B7/26 ,  H04J13/04

    Abstract: PROBLEM TO BE SOLVED: To provide a method and a device to completely suppress an interference vector in a DS-CDMA communications system. SOLUTION: Receiving branches 1 to 4 are allocated to a multi-path from both a sector that performs soft handoff and a sector that does not perform soft handoff (404 and 406). The set of a traffic channel included in a sector signal is decided for each receiving circuit (410). Interference is classified according to a prescribed interference condition for each receiving circuit (412). A set of interference vectors is selected from a classifying list of interference (414) and a desired code of a receiver or orthogonal projection of a Walsh code is calculated (416). Next, the receiving circuit inversely spreads received data by utilizing the orthogonal projection in its correlating device (418).

    SEMICONDUCTOR DEVICE, MEMORY CELL AND ITS FORMING METHOD
    158.
    发明专利
    SEMICONDUCTOR DEVICE, MEMORY CELL AND ITS FORMING METHOD 失效

    公开(公告)号：JPH11251457A

    公开(公告)日：1999-09-17

    申请号：JP36097298

    申请日：1998-12-18

    Applicant: MOTOROLA INC

    Inventor： CRAIG S REEJI ,  MOSUMI BUHATT ,  YON-JU TOM RI ,  ANDREW G NAGY ,  LARRY E FURISA ,  FILIPIAK STANLEY M ,  DAVID L OMEERA ,  T P ONG ,  WOO MICHAEL P ,  TERRY G SPARKES ,  CAROL M GERATOS

    IPC: H01L21/768 ,  H01L21/8244 ,  H01L27/11

    Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device where the trouble due to contact at the forming of cross connection is dissolved. SOLUTION: A semiconductor device contains the memory array of a SRAM cell. The SRAM cell is formed by using a process flow which is closely connected by a logic-type device. The SRAM cell is formed by using not three typical semiconductor layers but a single semiconductor layer. The SRAM cell contains multiple features which can considerably reduce the size (can reduce it to the size below 0.25 micron, and possible down to 0.1 micron). The system of a local mutual connection part 522 is realized by a peculiar process integrated system and respective local mutual connection parts cross-connect the inverter of SRAM and form it into a single opening 70. The interconnection part 104 of word/line is shifted from the silicon part of the same word/line, and therefore the mutual connection part will not be an obstacle to bit line connection.

    CLOCK GENERATION METHOD AND SYSTEM THEREFOR
    159.
    发明专利
    CLOCK GENERATION METHOD AND SYSTEM THEREFOR 失效

    公开(公告)号：JPH11234125A

    公开(公告)日：1999-08-27

    申请号：JP21197598

    申请日：1998-07-10

    Applicant: MOTOROLA INC

    Inventor： HARDESTY JEFFREY R ,  HALL GEOFFREY ,  MCCOLLOUGH KELVIN

    IPC: G06F1/04 ,  G06F1/08 ,  H03K21/00 ,  H03L7/08 ,  H03L7/095 ,  H03L7/10 ,  H03L7/107 ,  H03L7/18

    Abstract: PROBLEM TO BE SOLVED: To provide a PLL clock generation system capable of eliminating faults due to overshoot without delaying a processor and reducing the time of a full power mode. SOLUTION: A PLL 310 generates PLL clock output to a frequency divider 330 for frequency dividing a PLL clock. The PLL 310 outputs a frequency lock signal corresponding to the acquisition of a desired output frequency and it starts a counter 320 and enables the execution of a CPU 350 clocked by a system clock. Thus, the CPU 350 performs execution during phase lock at a frequency-divided frequency without the danger of the fault by frequency overshooting. A phase lock signal outputted by the counter 320 is logically connected with signal output from the CPU 350 for requesting a maximum frequency operation. The frequency divider 330 is selected by the connected signal and the CPU 350 performs the execution at the maximum frequency when the PLL 310 is safely phase locked.

    SEMICONDUCTOR DEVICE HAVING SUB-CHIP SCALE PACKAGE STRUCTURE AND MANUFACTURE THEREOF
    160.
    发明专利
    SEMICONDUCTOR DEVICE HAVING SUB-CHIP SCALE PACKAGE STRUCTURE AND MANUFACTURE THEREOF 失效

    公开(公告)号：JPH11233687A

    公开(公告)日：1999-08-27

    申请号：JP31704798

    申请日：1998-11-09

    Applicant: MOTOROLA INC

    Inventor： HIGGINS III LEO M

    IPC: H01L23/12 ,  H01L21/301 ,  H01L23/31 ,  H01L23/498

    Abstract: PROBLEM TO BE SOLVED: To package a ball grid array(BGA) (a Motorola Co. trade mark) in a chip with a wafer-level packaging having high reliability at lower cost, wherein standard constituent apparatus are usable. SOLUTION: A semiconductor device 1 has a sub chip-scale package structure in which a substrate 50 has at least one of sizes X and Y which is smaller than corresponding size of a semiconductor die 10. The semiconductor device 10 has a plurality of electrical connections between the semiconductor die and the substrate, and the electrical connections 15, 20 are provided in the outside of the substrate, so that the semiconductor device 1 can be packaged at a wafer level of the semiconductor die 10, (i.e., before the semiconductor dies are divided separately).

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