公开(公告)号：US07479792B2

公开(公告)日：2009-01-20

申请号：US11403138

申请日：2006-04-11

Applicant: Gaetan L. Mathieu ,  Igor Y. Khandros ,  Carl V. Reynolds

Inventor： Gaetan L. Mathieu ,  Igor Y. Khandros ,  Carl V. Reynolds

IPC: G01R31/02

CPC classification number: H05K3/42 ,  G01R1/06711 ,  G01R1/07307 ,  G01R3/00 ,  H05K3/308 ,  H05K2201/09836 ,  H05K2203/0338 ,  Y10T29/49117 ,  Y10T29/49139 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49156 ,  Y10T29/49162 ,  Y10T29/49165 ,  Y10T29/49169 ,  Y10T29/49194

Abstract: Methods are provided for making plated through holes usable for inserting and attaching connector probes. In a first method, a curved plated through hole is formed by bonding curved etchable wires to a first substrate, plating the wires with a non-etchable conductive material, encasing the plated wires with a dielectric material to form a second substrate, planing the second substrate to expose the etchable wire, and etching the wires to leave plated through holes. In a second method, wires coated with a first etchable layer are initially bonded to a substrate, a second non-etchable plating layer is then applied over the first layer, and the first layer is etched away leaving plated through holes with wires disposed inside. In a third embodiment, a layer of masking material is initially deposited on a substrate and etched to form holes which are filled with a sacrificial fill material, the masking material is then removed, the fill material plated, grinding is performed to remove some plating to expose the fill material, and the fill material is then etched away leaving plated attachment wells. Probes may be attached to the plated through holes or attachment wells to create resilient spring contacts to form a wafer probe card assembly. A twisted tube plated through hole structure is formed by supporting twisted sacrificial wires coated with the plating material in a substrate, and later etching away the wires.

Abstract translation: 提供了用于制造用于插入和连接连接器探针的电镀通孔的方法。 在第一种方法中，通过将弯曲的可蚀刻线接合到第一衬底上形成弯曲的电镀通孔，用不可蚀刻的导电材料镀覆电线，用电介质材料包住电镀线以形成第二衬底， 衬底以暴露可蚀刻线，并蚀刻电线以留下镀通孔。 在第二种方法中，首先将涂覆有第一可蚀刻层的线接合到衬底上，然后将第二不可蚀刻镀层施加在第一层上，并且第一层被蚀刻掉，从而通过设置在内部的布线的孔通过电镀。 在第三实施例中，掩模材料层最初沉积在衬底上并被蚀刻以形成填充有牺牲填充材料的孔，然后去除掩模材料，电镀填充材料，进行研磨以除去一些电镀 露出填充材料，然后将填充材料蚀刻掉，留下电镀的连接孔。 探针可以附着到电镀通孔或连接孔，以产生弹性弹簧触点，以形成晶片探针卡组件。 通过将涂覆有电镀材料的扭转牺牲线支撑在基板中，并且随后蚀刻掉线来形成扭曲管镀通孔结构。

公开(公告)号：US20080237882A1

公开(公告)日：2008-10-02

申请号：US11731432

申请日：2007-03-30

Applicant: Islam Salama

Inventor： Islam Salama

IPC: H01L23/52 ,  H01L21/44

CPC classification number: H01L23/5226 ,  H01L21/486 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K3/0035 ,  H05K3/421 ,  H05K2201/09827 ,  H05K2201/09836 ,  H01L2924/00

Abstract: In some embodiments, annular via drilling (AVD) technology is presented. In this regard, an annular via is introduced comprising an inner wall and an outer wall, the inner wall and the outer wall coupled with a dielectric layer and extending linearly from a surface of a conductor to a top of the dielectric layer. Other embodiments are also disclosed and claimed.

Abstract translation: 在一些实施例中，呈现环形通孔钻孔（AVD）技术。 在这方面，引入环形通孔，其包括内壁和外壁，内壁和外壁与电介质层耦合并且从导体的表面线性地延伸到电介质层的顶部。 还公开并要求保护其他实施例。

公开(公告)号：US20080236880A1

公开(公告)日：2008-10-02

申请号：US12056854

申请日：2008-03-27

Applicant: Hirotoshi OZAKI ,  Akiko MORIMOTO ,  Tetsuya YAMASHITA

Inventor： Hirotoshi OZAKI ,  Akiko MORIMOTO ,  Tetsuya YAMASHITA

IPC: H01R12/06 ,  H05K1/00

CPC classification number: H01R12/7082 ,  H05K1/182 ,  H05K3/3421 ,  H05K2201/09836 ,  H05K2201/10037 ,  H05K2201/10484 ,  H05K2201/10651 ,  H05K2201/10856 ,  H05K2203/0195 ,  H05K2203/082

Abstract: A lead-attached electrical element and a mounting board to which the lead-attached electrical element is mounted both contribute to a reduction in the size of the mounting board as well as facilitate rework. The lead-attached electrical element is constituted from an electrical element and two leads. Each lead includes a main portion which is bonded to a respective electrode face of the electrical element, and a bent portion which is inclined with respect to the main portion. The mounting board is constituted from a PC (printed circuit) board and the lead-attached electrical element. Two conductive lands are provided on a surface of the PC board. The lead-attached electrical element has been inserted into an aperture in the PC board, and bent portions of the leads attached to the electrical element are bonded to the conductive lands so that the electrical element is suspended in the aperture by the leads.

Abstract translation: 安装有引线的电气元件的引线附接电气元件和安装板都有助于减小安装板的尺寸并且便于返工。 引线连接的电气元件由电气元件和两个引线构成。 每个引线包括结合到电气元件的相应电极面的主要部分和相对于主要部分倾斜的弯曲部分。 安装板由PC（印刷电路板）和带引线的电气元件构成。 在PC板的表面上设置两个导电焊盘。 引线连接的电气元件已经插入到PC板的孔中，并且附接到电气元件的引线的弯曲部分被接合到导电焊盘，使得电气元件通过引线悬挂在孔中。

公开(公告)号：US07335979B2

公开(公告)日：2008-02-26

申请号：US10880154

申请日：2004-06-28

Applicant: Michael J. Walk

Inventor： Michael J. Walk

IPC: H01L23/12 ,  H01L23/04

CPC classification number: H01L23/49811 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/01078 ,  H01L2924/16152 ,  H05K1/114 ,  H05K2201/09836 ,  H05K2201/10719

Abstract: An article of manufacture and system, as well as fabrication methods therefore, may include a plurality of lands disposed on a surface of a substrate wherein the lands are oriented at an angle to the surface of the substrate and further wherein the substrate is formed of conductive layers that are formed such that a non-conductive layer does not interpose between the conductive layers and their coupling.

Abstract translation: 因此，制品和系统以及制造方法可以包括设置在基板的表面上的多个焊盘，其中焊盘与衬底的表面成一定角度定向，并且其中衬底由导电 形成为使得不导电层不插入在导电层之间的层和它们的耦合。

公开(公告)号：US07207107B2

公开(公告)日：2007-04-24

申请号：US10495564

申请日：2002-11-14

Applicant: Juergen Usner ,  Ando Welling

Inventor： Juergen Usner ,  Ando Welling

IPC: H05K3/02

CPC classification number: G06K19/0775 ,  B26D7/27 ,  B26F1/18 ,  B26F1/22 ,  G06K19/077 ,  H05K3/4084 ,  H05K2201/09081 ,  H05K2201/09836 ,  H05K2203/0195 ,  H05K2203/081 ,  H05K2203/082 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49135 ,  Y10T29/49156 ,  Y10T29/5136 ,  Y10T29/5148 ,  Y10T29/5313 ,  Y10T83/0207

Abstract: A method and apparatus for through-contacting flexible substrates 1, in particular circuit boards, having electrically conductive contact zones 4, 41 present on two opposing surfaces 1a, 1b of the substrate provides that a cut 11 is produced obliquely to the surfaces of the substrate in the area of the contact zones, and the two substrate areas 20, 30 adjoining the oblique cut are moved past each other until they lock behind each other. Moving them past each other is effected by a ram 12, by the action of compressed air 13, by applying a vacuum 14 or by a driving hook 15 fixed to the cutting tool. The two steps of producing the cut and moving the two substrate areas adjoining the cut past each other are effected in a common processing station, preferably in a single operation.

Abstract translation: 存在于基板的两个相对表面1a，1b上的具有导电接触区域41,41的柔性基板1，特别是电路板的通过接触的方法和装置提供了一种切口11，其倾斜于 接触区域中的基板和与倾斜切口相邻的两个基板区域20,30彼此移动，直到它们彼此锁定。 通过压头空气13的作用，通过施加真空14或固定在切割工具上的驱动钩15，通过柱塞12进行移动。 在共同的处理站中，优选地在单个操作中实现产生切割和移动邻接切割的两个基板区域的两个步骤。

公开(公告)号：US07205668B2

公开(公告)日：2007-04-17

申请号：US11285334

申请日：2005-11-22

Applicant: Ching-Yuan Wu ,  Kuang-Jen Liu ,  Chun-Chi Hsu

Inventor： Ching-Yuan Wu ,  Kuang-Jen Liu ,  Chun-Chi Hsu

IPC: H01L23/04 ,  H01L23/02 ,  H05K7/06

CPC classification number: H05K1/115 ,  H05K3/421 ,  H05K3/429 ,  H05K2201/0394 ,  H05K2201/09509 ,  H05K2201/09836

Abstract: A multi-layer printed circuit board (PCB) includes a first wire layer, a middle layer above the first wire layer, a second wire layer above the middle layer, and a slanting via formed in the middle layer and the second wire layer. The manufacturing method includes the steps of providing a first wire layer and forming a first wiring on the first wire layer, forming a middle layer on the first wire layer, forming a second wire layer on the middle layer, forming a slanting via in the middle layer and the second wire layer wherein the direction of the slanting via is not orthogonal to the first and the second wire layers, forming a second wiring on the second wire layer by an etching method, and forming an electroplated layer in the via to connect the first wiring and the second wiring.

Abstract translation: 多层印刷电路板（PCB）包括第一布线层，第一布线层之上的中间层，中间层上方的第二布线层和形成在中间层和第二布线层中的倾斜孔。 该制造方法包括以下步骤：在第一布线层上形成第一布线层并形成第一布线，在第一布线层上形成中间层，在中间层上形成第二布线层，在中间层形成倾斜孔 层和第二线层，其中倾斜通孔的方向不与第一和第二线层正交，通过蚀刻方法在第二线层上形成第二布线，并且在通孔中形成电镀层以连接 第一布线和第二布线。

公开(公告)号：US20070049130A1

公开(公告)日：2007-03-01

申请号：US11510591

申请日：2006-08-28

Applicant: Toshiya Kojima ,  Gentaro Furukawa

Inventor： Toshiya Kojima ,  Gentaro Furukawa

IPC: H01R13/40

CPC classification number: H05K3/06 ,  B41J2/14233 ,  B41J2002/14459 ,  B41J2002/14491 ,  B41J2202/18 ,  H05K1/0265 ,  H05K3/041 ,  H05K3/061 ,  H05K3/107 ,  H05K3/244 ,  H05K2201/09018 ,  H05K2201/09036 ,  H05K2201/09045 ,  H05K2201/09236 ,  H05K2201/09736 ,  H05K2201/098 ,  H05K2201/09827 ,  H05K2201/09836 ,  H05K2201/09981 ,  H05K2203/0108 ,  H05K2203/1527

Abstract: The wiring substrate comprises: a recess section and a projecting section formed on at least one surface of the wiring substrate; and wires formed on both the recess section and the projecting section.

Abstract translation: 布线基板包括：形成在布线基板的至少一个表面上的凹部和突出部; 以及形成在所述凹部和所述突出部两者上的线。

公开(公告)号：US20060131283A1

公开(公告)日：2006-06-22

申请号：US11016440

申请日：2004-12-17

Applicant: Jeffrey Hall ,  Yogendra Ranade ,  Sarathy Rajagopalan

Inventor： Jeffrey Hall ,  Yogendra Ranade ,  Sarathy Rajagopalan

IPC: B23K26/38

CPC classification number: H01L21/486 ,  H01L23/49816 ,  H01L23/49827 ,  H01L2224/48227 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K1/115 ,  H05K3/0032 ,  H05K3/0047 ,  H05K3/42 ,  H05K2201/09836 ,  Y10T408/86

Abstract: A method and apparatus for making angled vias in an integrated circuit package substrate includes providing an integrated circuit package substrate having an upper surface and a lower surface. A first position is selected for a first via opening on the upper surface of the package substrate, and a second position is selected for a second via opening on the lower surface of the package substrate. A selected non-vertical angle is determined for forming an angled via through the first position and the second position. The angled via is formed through the first position and the second position at the selected non-vertical angle.

Abstract translation: 一种用于在集成电路封装衬底中形成倾斜通孔的方法和装置包括提供具有上表面和下表面的集成电路封装衬底。 对于封装基板的上表面上的第一通孔，选择第一位置，并且在封装基板的下表面上选择用于第二通孔的第二位置。 确定所选择的非垂直角以形成通过第一位置和第二位置的成角度的通孔。 成角度的通孔以选定的非垂直角通过第一位置和第二位置形成。

公开(公告)号：US20060046537A1

公开(公告)日：2006-03-02

申请号：US10927760

申请日：2004-08-27

Applicant: Chin Chong ,  Choon Lee

Inventor： Chin Chong ,  Choon Lee

IPC: H01R12/00

CPC classification number: H01R12/526 ,  H05K1/115 ,  H05K3/42 ,  H05K2201/09836 ,  Y10T29/49147 ,  Y10T29/49165 ,  Y10T29/49204 ,  Y10T29/4921 ,  Y10T29/49211 ,  Y10T29/4922

Abstract: Circuit boards, microelectronic devices, and other apparatuses having slanted vias are disclosed herein. In one embodiment, an apparatus for interconnecting electronic components includes a dielectric portion having a first surface and a second surface. A first terminal is disposed on the first surface of the dielectric portion for connection to a first electronic component. A second terminal is disposed on the second surface of the dielectric portion for connection to a second electronic component. The apparatus further includes a passage extending through the dielectric portion along a longitudinal axis oriented at an oblique angle relative to the first surface. The passage is at least partially filled with conductive material electrically connecting the first terminal to the second terminal.

公开(公告)号：US20050251777A1

公开(公告)日：2005-11-10

申请号：US10839488

申请日：2004-05-05

Applicant: Gerald Bartley ,  Darryl Becker ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

Inventor： Gerald Bartley ,  Darryl Becker ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

IPC: G06F17/50 ,  H01L21/44 ,  H01L23/498 ,  H05K1/11 ,  H05K3/00 ,  H05K3/42

CPC classification number: H01L23/49827 ,  H01L2224/16 ,  H01L2924/01078 ,  H01L2924/15173 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K1/112 ,  H05K1/115 ,  H05K3/0032 ,  H05K3/429 ,  H05K2201/09836

Abstract: A method and structure are provided for implementing enhanced electronic packaging and printed circuit board (PCB) layout. A diagonal via is formed at a selected angle between a first side and an opposite second side of a printed circuit board at a selected printed circuit board location. The diagonal via is plated with an electrically conductive material. Diagonal vias are used to interconnect between a high-density pitch on the first side and a larger pitch on the opposite second side of the printed circuit board. The diagonal vias can be used to selectively interconnect electrical patterns of selected layers and eliminate the use of blind and buried vias.

Abstract translation: 提供了一种用于实现增强型电子封装和印刷电路板（PCB）布局的方法和结构。 在所选择的印刷电路板位置处，在印刷电路板的第一侧和相对的第二侧之间以选定的角度形成对角通孔。 对角通孔镀有导电材料。 对角通孔用于在第一侧上的高密度间距和在印刷电路板的相对的第二侧上的较大节距之间进行互连。 对角通孔可用于选择性地互连所选层的电气图案，并消除使用盲孔和埋孔。