公开(公告)号：DE4444776A1

公开(公告)日：1996-06-27

申请号：DE4444776

申请日：1994-12-15

Applicant: KOREA ELECTRONICS TELECOMM ,  KOREA TELECOMMUNICATION

Inventor： RYUM BYUNG-RYUL ,  HAN TAE-HYEON ,  LEE SOO-MIN ,  CHO DEOK-HO ,  LEE SEONG-HEARN ,  KANG JIN-YOUNG

IPC: H01L21/331 ,  H01L29/732 ,  H01L29/737 ,  H01L29/735

Abstract: Disclosed is a fabrication of a bipolar transistor with a super self-aligned vertical structure in which emitter, base and collector are vertically self-aligned, the fabrication method comprising the steps of forming a conductive buried collector region in a silicon substrate by using ion-implantation of an impurity and thermal-annealing; sequentially forming several layers; selectively removing the nitride and polysilicon layers to form a pattern; sequentially forming a silicon oxide layer, a third layer and a silicon oxide layer thereon; forming a patterned photoresist layer thereon to define active and inactive regions and removing several layers on the active region to form an opening; forming a side wall on both sides of the opening; forming a collector on a surface portion of the buried collector region up to a lower surface of the polysilicon layer; removing the side wall and the third nitride layer to expose a side surface of the second polysilicon layer; selectively forming a base on an upper surface of the collector including a side surface of the polysilicon layer; forming side wall oxide layer on both sides of the base and the silicon oxide to define an emitter region; forming an emitter on the base; and forming electrodes thereon. In the method, an active region is defined by a photolithography, and thereby a trench isolation acting as factors of lowering in integration and device-performance can be omitted in the method. As a result, fabrication sequence can be simplified and integration can be improved.

公开(公告)号：GB2296375A

公开(公告)日：1996-06-26

申请号：GB9425590

申请日：1994-12-19

Applicant: KOREA ELECTRONICS TELECOMM ,  KOREA TELECOMMUNICATION

Inventor： RYUM BYUNG-RYUL ,  CHO DEOK-HO ,  HAN TAE-HYEON ,  LEE SOO-MIN ,  KWON OH-JOON

IPC: H01L21/331 ,  H01L29/737

Abstract: Disclosed is a fabrication of a hetero-junction bipolar transistor in which a base parasitic capacitance is reduced by using a metallic silicide as the base (25), comprising the steps of injecting an impurity in a silicon substrate to form a conductive buried collector region (21); growing a collector epitaxial layer (22) on the buried collector region and forming a field oxide layer (23); selectively injecting an impurity into the collector epitaxial layer to form a collector sinker; sequentially forming a base layer (25) and a first oxide layer thereon; patterning the first oxide layer to define an extrinsic base region; ion-implanting an impurity in the extrinsic base region using a patterned oxide layer as a mask and removing the patterned oxide layer; depositing a metallic silicide film (26) thereon to form a base electrode thin film; forming a capping oxide layer (27), forming an isolating oxide layer thereon and sequentially and selectively removing the isolating oxide layer, the capping oxide layer, the base electrode thin film and the base layer using a patterned photomask, removing a portion of the isolating oxide layer to define an emitter region; forming a passivation layer thereon and selectively removing the passivation layer to form contact holes; and depositing a polysilicon layer doped with impurity ions in the contact holes to form electrodes.

公开(公告)号：AT400646B

公开(公告)日：1996-02-26

申请号：AT219292

申请日：1992-11-06

Applicant: KOREA TELECOMMUNICATION

IPC: G10L13/04 ,  G10L13/06 ,  G10L19/00 ,  G10L21/04 ,  G10L25/90 ,  G10L5/04

公开(公告)号：GB2290904A

公开(公告)日：1996-01-10

申请号：GB9513058

申请日：1995-06-27

Applicant: KOREA ELECTRONICS TELECOMM ,  KOREA TELECOMMUNICATION

Inventor： LEE JAE SEUNG ,  SHIM CHANG SUP

IPC: G02B6/02 ,  G02F1/35 ,  H01S3/06 ,  H01S3/067 ,  H01S3/07 ,  H01S3/23 ,  H04J14/02 ,  H04B10/04 ,  H04B10/17

Abstract: The apparatus includes an erbium doped optical fibre amplifier 11 which generates spontaneously emitted, amplified noise beam when no optical signal is applied thereto, a beam expander 40 which increases the cross section of the beam, passes it through free space, and then reduces the cross section, and a second erbium doped optical fibre amplifier 12 which amplifies the output from the beam expander. Optical fibres and couplers 21, 22 couple light from laser diode beam generator 60 into the two optical fibres and optical isolators 31, 32, 33 prevent unwanted oscillation. A Fabry-perot filter 50 is located in the free space in the middle of the beam expander and produces a plurality of wavelength spaced channels which can be used in a wavelength division multiplexing system. The channel width of the system is varied by rotation of the filter without affecting the free spectral range and the power of output light.

公开(公告)号：FR2640079B1

公开(公告)日：1995-11-10

申请号：FR8915925

申请日：1989-12-01

Applicant: ELECTRONIC & TELECOMM RES INST ,  KOREA TELECOMMUNICATION

Inventor： PARK HYUNG MOO ,  KIM DONG GOO

IPC: H01L29/812 ,  H01L21/285 ,  H01L21/338 ,  H01L29/417 ,  H01L29/78

Abstract: The invention provides the method of manufacturing a self-aligned GaAs MESFET wherein the Si thin film formed by PECVD (Plasma Enhanced Chemical Vapor Deposition) and the Si3N4 film formed by PCVD (Photo Chemical Vapor Deposition) onto the GaAs substrate are used as the capping film in the activation process, and then the self-aligned MESFET with the T type gate is manufactured through the selective chemical vapor deposition of the tungsten onto the Si thin film. As a result, the gap between the gate electrode and the n+ layer can be adjusted itself.

公开(公告)号：FR2713365A1

公开(公告)日：1995-06-09

申请号：FR9414597

申请日：1994-12-05

Applicant: KOREA TELECOMMUNICATION

Inventor： YUN HO LEE ,  RYONG JANG CHUNG ,  LEE LEE MYUNG SUNG

IPC: G06F7/52 ,  G06F7/50 ,  G06F7/535 ,  G06F7/72 ,  G09C1/00 ,  G06F11/08

Abstract: The modulo reduction method operates in several steps. The first step is to look up a value stored in a table with the aid of an index formed of a number of high order bits, and adds the value accessed in the table to a number of low order bits. If the result obtained by the addition produces an overflow, the overflow is suppressed and the operation terminated. If on the other hand overflow does not occur, N on modulo N is added to the result obtained from the addition, and the operation terminated. The value with a most significant bit of one is selected when the value of N is determined by this last operation.

公开(公告)号：GB9425738D0

公开(公告)日：1995-02-22

申请号：GB9425738

申请日：1994-12-20

Applicant: KOREA ELECTRONICS TELECOMM ,  KOREA TELECOMMUNICATION

IPC: H03L7/06 ,  H03D7/16 ,  H03L7/183 ,  H04B1/04 ,  H04B7/19

Abstract: In the TRO(Transmit Reference Oscillator) for generating a reference frequency to transmit data about 500 MHz total bandwidth which is a bandwidth of a satellite communication relay, the apparatus comprises: a 15 dividing means 22 for dividing 5MHz reference signal locked from a hub station by 15, and outputting 333.3 KHz; a VCO(Voltage Controlled Oscillator) means 25 for inputting a filtered DC voltage, and outputting a transmit reference frequency; a 4 dividing means 26 for inputting the transmit reference frequency outputted from the VCO means 25, and dividing by 4; a CP(Control Processor) means 29 for outputting a divide rate control signal; a N dividing means 27 for outputting and dividing the 4 divided signal from the 4 dividing means 26 by N according to the divide rate control signal of the CP means 29; a phase detecting means 23 for comparing an output signal phase of the N dividing means 27 with an output signal phase of the 15 dividing means 22, and detecting its difference signal; a low pass filtering means 24 for filtering the phase difference signal detected from the phase detecting means 23, and outputting it into the VCO means 25; and an alarm generating means 28 for inputting the output signal of the 15 dividing means 22 and the output signal of the N dividing means 27, and generating an alarm signal according to a phase difference.

公开(公告)号：GB9425244D0

公开(公告)日：1995-02-08

申请号：GB9425244

申请日：1994-12-14

Applicant: KOREA ELECTRONICS TELECOMM ,  KOREA TELECOMMUNICATION

IPC: H01P1/205 ,  H01P5/08 ,  H01P7/04

Abstract: A dielectric resonator includes a dielectric block having an open surface at one of the surfaces thereof, the remaining surfaces being plated with a conductor. The dielectric block has an inner conductor hole formed at a surface of the dielectric block opposite to the open surface, the inner conductor hole extending a predetermined depth toward the open surface such that it does not perforate through the open surface. An electrode pattern is formed on the open surface such that it faces an end surface of the inner conductor hole, the electrode pattern being adapted to provide an input/output capacitor. The dielectric block has a coupling window formed on a predetermined portion of one of the surfaces of the dielectric block, except for the open surface and the surface formed with the inner conductor hole, at a position adjacent to one of the open surface and the surface formed with the inner conductor hole. The coupling window is free of the plated conductor and adapted to control a coupling degree of the resonator to another resonator. Other embodiments include integral type filters having resonators in a single dielectric block.

公开(公告)号：DE4422682A1

公开(公告)日：1995-01-05

申请号：DE4422682

申请日：1994-06-28

Applicant: KOREA TELECOMMUNICATION

Inventor： KWON SOON HONG ,  KIM EUN HO ,  JIN BYUNG WOOK

IPC: G06K19/07 ,  G06K19/00 ,  G06K19/073 ,  G07F7/00 ,  G07F7/08 ,  H04M15/00 ,  H04M17/00

Abstract: Prepaid card, used in public telephones, with an integrated circuit which is capable of preventing increasing the usable amount of money and in the process of minimising the capacity of its memory. The prepaid card with an integrated circuit is controlled in that an input-output stage of the card is compelled to receive a new usable amount of money and an instruction to communicate from a public telephone, in that it is determined whether the instruction to communicate which is received from the input-output stage is a command to update the usable amount of money stored in a memory of the card, in that a comparator, with which the card is equipped, is compelled to compare the new usable amount of money with the usable amount of money which is stored in the memory, and in that an updating of the usable amount of money which is stored in the memory is controlled on the basis of the result of the comparison.

公开(公告)号：FR2702907A1

公开(公告)日：1994-09-23

申请号：FR9403202

申请日：1994-03-18

Applicant: TELECOMMUNICATIONS ELECT ,  KOREA TELECOMMUNICATION

Inventor： KIM YOUNG SUP ,  CHOI SONG IN ,  PARK HONG SHIK

IPC: H04K1/04 ,  H04L9/12 ,  H04L9/22 ,  H04Q3/00

Abstract: The invention relates to a parallel, distributed, sample-decrypter for a cell-based ATM physical layer, including a PRBS generator (22) intended to generate an 8-bit random number in order to execute a generator polynomial given by x + X + 1, a decrypter (21) intended to add 8 reception data bits to the 8 bits of the random number and deliver the decrypted data bits, and a sample processor (23) intended to extract, as first and second samples, 2 bits of the 8-bit random number in response to external synchronous clock and sampling clock signals, to extract, as PRBS samples from a sender, first and second highest-order bits of a syndrome signal originating from a cell delineation part in response to the two clock signals, to compare the first and second samples and the first and second highest-order bits with each other, and to deliver first and second synchronous signals depending on the result of the comparison.