公开(公告)号：US20050013087A1

公开(公告)日：2005-01-20

申请号：US10850958

申请日：2004-05-21

Applicant: Ming Wu ,  Hung Nguyen ,  Doo-Young Hah ,  Pamela Patterson

Inventor： Ming Wu ,  Hung Nguyen ,  Doo-Young Hah ,  Pamela Patterson

IPC: B81B5/00 ,  H01G5/06 ,  H01G5/00

CPC classification number: H01G5/06 ,  B81B2201/0221 ,  B81B2203/0136 ,  B81C1/00007

Abstract: A MEMS tunable capacitor with angular vertical comb-drive (AVC) actuators is described where high capacitances and a wide continuous tuning range is achieved in a compact space. The comb fingers rotate through a small vertical angle which allows a wider tuning range than in conventional lateral comb drive devices. Fabrication of the device is straightforward, and involves a single deep reactive ion etching step followed by release and out-of-plane assembly of the angular combs.

Abstract translation: 描述了具有角度垂直梳驱动（AVC）致动器的MEMS可调谐电容器，其中在紧凑的空间中实现高电容和宽的连续调谐范围。 梳指旋转一个较小的垂直角度，这允许比常规侧梳驱动装置更宽的调谐范围。 该装置的制造是直接的，并涉及单个深反应离子蚀刻步骤，随后释放和平面外组装角梳。

公开(公告)号：US20030104649A1

公开(公告)日：2003-06-05

申请号：US10218902

申请日：2002-08-15

Inventor： Mehmet Ozgur ,  Mona Elwakkad Zaghloul

IPC: H01L021/00 ,  H01L029/82 ,  H01L029/00

CPC classification number: B81C1/00246 ,  B81B2201/0221 ,  B81C1/00801 ,  B81C2201/0167 ,  B81C2203/0735

Abstract: A method is provided for fabricating a CMOS based micro-electromechanical system (MEMS) integrated circuit. A CMOS circuit layout is fabricated on a silicon substrate. A first thick film photo resist layer is then deposited on the CMOS circuit layout. To prevent oxidation from occurring between aluminum and gold, a seed layer is applied to the first thick film photo resist layer. A mold is then formed by selectively depositing a second thick film photo resist layer on portions of the seed layer so that a conductive layer can be applied to the mold. Portions of the seed layer are then removed and a stress compensation material is applied to the conductive layer. A back side surface of the silicon substrate is then etched to remove areas not covered by a mask, and the first thick film photo resist layer is removed via openings in the CMOS circuit layout.

Abstract translation: 提供了一种用于制造基于CMOS的微机电系统（MEMS）集成电路的方法。 在硅衬底上制造CMOS电路布局。 然后在CMOS电路布局上沉积第一厚膜光致抗蚀剂层。 为了防止在铝和金之间发生氧化，将种子层施加到第一厚膜光致抗蚀剂层。 然后通过在种子层的部分上选择性地沉积第二厚膜光致抗蚀剂层来形成模具，使得可以将导电层施加到模具。 然后去除种子层的一部分，并且将应力补偿材料施加到导电层。 然后蚀刻硅衬底的背侧表面以除去未被掩模覆盖的区域，并且通过CMOS电路布局中的开口去除第一厚膜光致抗蚀剂层。

公开(公告)号：US20240217810A1

公开(公告)日：2024-07-04

申请号：US18090987

申请日：2022-12-29

Applicant: Knowles Electronics, LLC

Inventor： Michael Jennings ,  Steven Boor ,  Divya Kesharwani

IPC: B81B7/02 ,  H02N1/00

CPC classification number: B81B7/02 ,  H02N1/002 ,  B81B2201/0221

Abstract: A microelectromechanical systems (MEMS) sensor, a capacitive MEMS motor sensing circuit and a method are provided. The present application provides a microelectromechanical systems (MEMS) sensor. The MEMS sensor includes a housing having electrical contacts disposed on an exterior of the housing. The MEMS sensor further includes a capacitive MEMS motor disposed in the housing, and an electrical circuit disposed in the housing and being electrically coupled to the electrical contacts. The electrical circuit includes a bias voltage source having an output coupled to an input of the MEMS motor. The electrical circuit further includes a buffer circuit including an amplifier input stage having an input coupled to an output of the MEMS motor. The electrical circuit still further includes a frequency dependent input attenuator including a feedback capacitor and an input attenuator low pass filter, the input attenuator low pass filter having an input coupled to the output of the amplifier input stage and an output coupled to a first terminal of the feedback capacitor, where a second terminal of the feedback capacitor is coupled to the input of the amplifier input stage.

公开(公告)号：US11912564B2

公开(公告)日：2024-02-27

申请号：US16944362

申请日：2020-07-31

Applicant: Knowles Electronics, LLC

Inventor： Adam Ariffin ,  Donald Yochem

IPC: B81B7/00 ,  H04R19/04

CPC classification number: B81B7/008 ,  H04R19/04 ,  B81B2201/0221 ,  B81B2201/0257 ,  H04R2201/003

Abstract: A sensor package can include a substrate including a plurality of layers. The plurality of layers can include a first pair of layers and a second pair of layers different from the first pair of layers. The substrate can have a first side and a second side opposite the first side. The sensor package can include a transducer coupled to the second side of the substrate. The sensor package can include an inductor electrically coupled to the transducer. The inductor can be configured as a single layer trace on an inductor layer within the substrate and disposed between the first pair of layers within the substrate. The first pair of layers can be more distal from the second side of the substrate than the second pair of layers.

公开(公告)号：US20190233276A1

公开(公告)日：2019-08-01

申请号：US16382750

申请日：2019-04-12

Applicant: Infineon Dresden GmbH & Co. KG

Inventor： Sebastian PREGL ,  Uwe RUDOLPH

IPC: B81B3/00 ,  B81C1/00

CPC classification number: B81B3/0051 ,  B81B3/0086 ,  B81B2201/0221 ,  B81B2201/0257 ,  B81B2201/042 ,  B81B2203/0136 ,  B81B2203/0181 ,  B81B2203/0315 ,  B81B2203/04 ,  B81B2203/058 ,  B81C1/00166 ,  B81C1/00182 ,  B81C2201/013 ,  B81C2203/0136

Abstract: A method for forming a MEMS device may include performing a silicon-on-nothing process to form a cavity in a monocrystalline silicon substrate at a first depth relative to a top surface of the monocrystalline silicon substrate; forming, in an electrically conductive electrode region of the monocrystalline silicon substrate, an electrically insulated region extending to a second depth that is less than the first depth relative to the top surface of the monocrystalline silicon substrate; and etching the monocrystalline silicon substrate to expose a gap between a first electrode and a second electrode, wherein the second electrode is separated from the first electrode, within a first depth region, by a first distance defined by the electrically insulated region and the gap, and wherein the second electrode is separated from the first electrode, within a second depth region, by a second distance defined by the gap.

公开(公告)号：US09966194B2

公开(公告)日：2018-05-08

申请号：US15385431

申请日：2016-12-20

Applicant: Texas Instruments Incorporated

Inventor： Arun Gupta ,  William C. McDonald ,  Adam Fruehling ,  Ivan Kmecko ,  Lance Barron ,  Divyanshu Agrawal ,  Arthur M. Turner ,  John C. Ehmke

IPC: H01L27/20 ,  H01L29/84 ,  H01G5/16 ,  H01G5/40 ,  H01G5/011 ,  B81B7/00

CPC classification number: H01G5/16 ,  B81B3/0008 ,  B81B3/001 ,  B81B3/0013 ,  B81B7/0064 ,  B81B7/008 ,  B81B7/02 ,  B81B2201/016 ,  B81B2201/0221 ,  B81B2203/0109 ,  B81B2203/0118 ,  B81B2203/0127 ,  B81B2203/0181 ,  B81B2203/053 ,  B81B2203/058 ,  B81B2203/06 ,  B81B2207/012 ,  B81B2207/096 ,  B81C1/00158 ,  H01G5/011 ,  H01G5/40

Abstract: A MEMs actuator device and method of forming includes arrays of actuator elements. Each actuator element has a moveable top plate and a bottom plate. The top plate includes a central membrane member and a cantilever spring for movement of the central membrane member. The bottom plate consists of two RF signal lines extending under the central membrane member. A MEMs electrostatic actuator device includes a CMOS wafer, a MEMs wafer, and a ball bond assembly. Interconnections are made from a ball bond to an associated through-silicon-via (TSV) that extends through the MEMS wafer. A RF signal path includes a ball bond electrically connected through a TSV and to a horizontal feed bar and from the first horizontal feed bar vertically into each column of the array. A metal bond ring extends between the CMOS wafer and the MEMS wafer. An RF grounding loop is completed from a ground shield overlying the array to the metal bond ring, a TSV and to a ball bond.

公开(公告)号：US20170271318A1

公开(公告)日：2017-09-21

申请号：US15611855

申请日：2017-06-02

Applicant: MURATA MANUFACTURING CO., LTD.

Inventor： TOSHIYUKI NAKAISO ,  NOBUO SAKAI

IPC: H01L27/02 ,  B81B7/00 ,  H01L29/93 ,  H01L27/08 ,  H01G7/06

CPC classification number: H01L27/0248 ,  B81B7/0022 ,  B81B2201/0221 ,  H01G4/33 ,  H01G7/06 ,  H01L27/0805 ,  H01L28/55 ,  H01L29/93

Abstract: A variable capacitance device that includes a semiconductor substrate, a redistribution layer disposed on a surface of the semiconductor substrate, and a plurality of terminal electrodes including first and second input/output terminals, a ground terminal and a control voltage application terminal. Moreover, a variable capacitance element section is formed in the redistribution layer from a pair of capacitor electrodes connected to the first and second input/output terminals, respectively, and a ferroelectric thin film disposed between the capacitor electrodes. Further, an ESD protection element is connected between the one of the input/output terminals and the ground terminal is formed on the surface of the semiconductor substrate.

公开(公告)号：US09725298B2

公开(公告)日：2017-08-08

申请号：US14988842

申请日：2016-01-06

Applicant: Robert Bosch GmbH

Inventor： Ando Feyh ,  Po-Jui Chen ,  Markus Ulm

IPC: H01L29/84 ,  H01L21/50 ,  B81C1/00 ,  B81B3/00 ,  B81B7/00 ,  H01L29/772 ,  H01L21/02 ,  H01L21/58

CPC classification number: B81B3/0021 ,  B81B2201/0221 ,  B81B2201/0228 ,  B81C1/00134 ,  B81C1/00246 ,  B81C2203/0771

Abstract: A method of fabricating a semiconductor device comprises forming a dielectric layer above a substrate, the dielectric layer including a fixed dielectric portion and a proof mass portion, forming a source region and a drain region in the substrate, forming a gate electrode in the proof mass portion, and releasing the proof mass portion, such that the proof mass portion is movable with respect to the fixed dielectric portion and the gate electrode is movable with the proof mass portion relative to the source region and the drain region.

公开(公告)号：US09721858B2

公开(公告)日：2017-08-01

申请号：US14675468

申请日：2015-03-31

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Pascal Fornara ,  Christian Rivero

IPC: H01L23/522 ,  H01L23/04 ,  H01L49/02 ,  B81B3/00 ,  H01G5/18 ,  H01L27/06

CPC classification number: H01L23/04 ,  B81B3/0021 ,  B81B2201/0221 ,  H01G5/18 ,  H01L23/5223 ,  H01L27/0629 ,  H01L28/40 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated circuit includes several metallization levels separated by an insulating region. A hollow housing whose walls comprise metallic portions is produced within various metallization levels. A controllable capacitive device includes a suspended metallic structure situated in the hollow housing within a first metallization level including a first element fixed on two fixing zones of the housing and at least one second element extending in cantilever fashion from the first element and includes a first electrode of the capacitive device. A second electrode includes a first fixed body situated at a second metallization level adjacent to the first metallization level facing the first electrode. The first element is controllable in flexion from a control zone of this first element so as to modify the distance between the two electrodes.

公开(公告)号：US09711290B2

公开(公告)日：2017-07-18

申请号：US15024931

申请日：2014-09-24

Applicant: CAVENDISH KINETICS, INC.

Inventor： Mickael Renault ,  Vikram Joshi ,  Robertus Petrus Van Kampen ,  Thomas L. Maguire ,  Richard L. Knipe

IPC: H01L29/84 ,  H01G5/16 ,  H01H59/00 ,  B81B3/00 ,  B81C1/00 ,  H01G5/011

CPC classification number: H01G5/16 ,  B81B3/0086 ,  B81B2201/0221 ,  B81B2203/04 ,  B81C1/00166 ,  B81C2201/0104 ,  B81C2201/0109 ,  H01G5/011 ,  H01H59/0009

Abstract: The present invention generally relates to a MEMS device and a method of manufacture thereof. The RF electrode, and hence, the dielectric layer thereover, has a curved upper surface that substantially matches the contact area of the bottom surface of the movable plate. As such, the movable plate is able to have good contact with the dielectric layer and thus, good capacitance is achieved.