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    Method of separating MEMS devices from a composite structure
    182.
    发明申请
    Method of separating MEMS devices from a composite structure 有权
    将MEMS器件与复合结构分离的方法

    公开(公告)号：US20060051935A1

    公开(公告)日：2006-03-09

    申请号：US11273271

    申请日：2005-10-28

    Applicant: Kia Silverbrook

    Inventor： Kia Silverbrook

    IPC: H01L21/30 ,  H01L21/78 ,  H01L21/50 ,  H01L21/00

    CPC classification number: B81C1/00904 ,  B81B2201/052 ,  B81C99/008 ,  H01L21/304 ,  H01L21/6835 ,  H01L21/78 ,  H01L2221/68322 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  Y10S438/977

    Abstract: A method of separating MEMS devices from a structure having a substrate, a sacrificial layer positioned on a front side of the substrate and a plurality of MEMS devices embedded in the sacrificial layer includes the step of securing a front handle wafer to the sacrificial layer. The substrate is etched from a back side to the sacrificial layer to define individual MEMS integrated circuits held together with the sacrificial layer. The front handle wafer is removed and the sacrificial layer is etched away to release the MEMS integrated circuits.

    Abstract translation: 将MEMS器件与具有衬底的结构，位于衬底的前侧上的牺牲层和嵌入牺牲层中的多个MEMS器件分离的方法包括将前把手晶片固定到牺牲层的步骤。 衬底从后侧蚀刻到牺牲层，以限定与牺牲层一起保持的单个MEMS集成电路。 去除前处理晶片并蚀刻牺牲层以释放MEMS集成电路。

    Method of fabricating MEMS devices on a silicon wafer
    184.
    发明申请
    Method of fabricating MEMS devices on a silicon wafer 失效
    在硅晶片上制造MEMS器件的方法

    公开(公告)号：US20050095742A1

    公开(公告)日：2005-05-05

    申请号：US10986354

    申请日：2004-11-12

    Applicant: Kia Silverbrook

    Inventor： Kia Silverbrook

    IPC: B81C1/00 ,  H01L21/00

    CPC classification number: B81C1/00904 ,  B81B2201/052 ,  B81C99/008 ,  H01L21/304 ,  H01L21/6835 ,  H01L21/78 ,  H01L2221/68322 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  Y10S438/977

    Abstract: A method of fabricating MEMS devices is provided. The method includes the steps of (a) providing a silicon wafer having a MEMS layer arranged on a MEMS side of the wafer; (b) applying a first holding means to the MEMS side of the wafer; (c) performing at least one operation on the wafer from a back side of the wafer opposed to the MEMS side; (d) applying a second holding means to said back side of the wafer; (e) removing the first holding means; (f) performing at least one deep silicon etch on the MEMS side of the wafer to define individual MEMS chips, each chip being composed of a part of the wafer and at least one part of the MEMS layer; and (g) causing the individual chips to be released from the second holding means.

    Abstract translation: 提供了一种制造MEMS器件的方法。 该方法包括以下步骤：（a）提供具有布置在晶片的MEMS侧上的MEMS层的硅晶片; （b）将第一保持装置施加到晶片的MEMS侧; （c）从与所述MEMS侧相对的所述晶片的背面对所述晶片进行至少一次操作; （d）将第二保持装置施加到晶片的所述背面; （e）移除第一保持装置; （f）在晶片的MEMS侧执行至少一个深硅蚀刻以限定各个MEMS芯片，每个芯片由晶片的一部分和MEMS层的至少一部分组成; 和（g）使各个芯片从第二保持装置释放。

    Method of manufacturing a fluid injection device
    185.
    发明授权
    Method of manufacturing a fluid injection device 有权
    制造流体注射装置的方法

    公开(公告)号：US06824960B2

    公开(公告)日：2004-11-30

    申请号：US10373235

    申请日：2003-02-24

    Applicant: In-Yao Lee ,  Chih-Ching Chen

    Inventor： In-Yao Lee ,  Chih-Ching Chen

    IPC: G03C500

    CPC classification number: B81C1/0042 ,  B01L3/0241 ,  B41J2/16 ,  B41J2/1629 ,  B41J2/1631 ,  B81B2201/052 ,  B81B2203/0392 ,  B81C1/00595 ,  B81C2201/0136

    Abstract: A method of manufacturing a fluid injection device. The method of the present invention applies a compensated geometric shape of the unetched isolating portions to increase the additional compensated portion for etching, or the ion implanting process to reduce the etching rate of the unetched isolating portions. Thus, crosstalk or overshoot in the isolating portions of the fluid injection device can be reduced, and the fluid injection device can be precisely manufactured in a small size.

    Abstract translation: 一种制造流体注射装置的方法。 本发明的方法应用未蚀刻绝缘部分的补偿几何形状以增加用于蚀刻的附加补偿部分，或离子注入工艺以降低未蚀刻绝缘部分的蚀刻速率。 因此，可以减少流体注入装置的隔离部分中的串扰或过冲，并且能够精确地制造流体注射装置。

    Method of micromachining a multi-part cavity
    187.
    发明申请
    Method of micromachining a multi-part cavity 失效
    微加工多部分腔体的方法

    公开(公告)号：US20020185469A1

    公开(公告)日：2002-12-12

    申请号：US10194167

    申请日：2002-07-11

    Applicant: Applied Materials, Inc.

    Inventor： Dragan Podlesnik ,  Thorsten Lill ,  Jeff Chinn ,  Shaoher X. Pan ,  Anisul Khan ,  Maocheng Li ,  Yiqiong Wang

    IPC: C23F001/00 ,  B44C001/22 ,  C03C015/00 ,  C03C025/68

    CPC classification number: H01L27/1087 ,  B81B2201/052 ,  B81B2203/0315 ,  B81B2203/033 ,  B81C1/00119 ,  B81C2201/016 ,  H01L21/3065 ,  H01L21/3086

    Abstract: The present disclosure pertains to our discovery of a particularly efficient method for etching a multi-part cavity in a substrate. The method provides for first etching a shaped opening, depositing a protective layer over at least a portion of the inner surface of the shaped opening, and then etching a shaped cavity directly beneath and in continuous communication with the shaped opening. The protective layer protects the etch profile of the shaped opening during etching of the shaped cavity, so that the shaped opening and the shaped cavity can be etched to have different shapes, if desired. In particular embodiments of the method of the invention, lateral etch barrier layers and/or implanted etch stops are also used to direct the etching process. The method of the invention can be applied to any application where it is necessary or desirable to provide a shaped opening and an underlying shaped cavity having varying shapes. The method is also useful whenever it is necessary to maintain tight control over the dimensions of the shaped opening.

    Abstract translation: 本公开涉及我们发现用于蚀刻衬底中的多部分空腔的特别有效的方法。 该方法提供了首先蚀刻成形开口，在成形开口的内表面的至少一部分上沉积保护层，然后直接在成形开口下面蚀刻成形腔，并与成形开口连续连通。 保护层在蚀刻成形腔体期间保护成形开口的蚀刻轮廓，从而如果需要，成形开口和成形腔体可以被蚀刻以具有不同的形状。 在本发明方法的特定实施例中，横向蚀刻阻挡层和/或注入的蚀刻停止点也用于引导蚀刻工艺。 本发明的方法可以应用于需要或期望提供具有不同形状的成形开口和下面的成形腔的任何应用。 只要需要对成形开口的尺寸进行严格控制，该方法也是有用的。

    Method of manufacturing microstructure by the anisotropic etching and bonding of substrates
    189.
    发明授权
    Method of manufacturing microstructure by the anisotropic etching and bonding of substrates 失效
    通过各向异性蚀刻和基板粘合制造微结构的方法

    公开(公告)号：US5589083A

    公开(公告)日：1996-12-31

    申请号：US346205

    申请日：1994-11-22

    Applicant: Kun-Young Ahn ,  Kyung-Ho Park ,  Kee-Soo Nam ,  Sang-Won Kang

    Inventor： Kun-Young Ahn ,  Kyung-Ho Park ,  Kee-Soo Nam ,  Sang-Won Kang

    IPC: B41J2/135 ,  B44C1/22 ,  B44C3/00 ,  B81C1/00 ,  G02B1/00 ,  H01L21/02 ,  H01L21/20 ,  H01L21/306 ,  H01L29/84 ,  H01L21/00

    CPC classification number: B44C1/227 ,  B44C3/005 ,  B81C1/00626 ,  H01L21/2007 ,  B81B2201/047 ,  B81B2201/052 ,  B81B2203/0353 ,  B81B2203/0361 ,  B81C2201/0133 ,  B81C2201/019 ,  Y10S438/973

    Abstract: The present invention relates to a method of manufacturing microstructure by the anisotropic etching and bonding of substrates so as to manufacture mechanically functioning micro-structures in various forms by uniting the same or different substrate bonding technique and selective anisotropic etching technique. This invention manufactures a pyramidal optical divider or an optical divider with a pyramidal structure located on a quadrilateral pillar by bonding one substrate on a substrate different in the direction of crystallization and anisotropically etching them thereafter. This invention manufactures variously shaped nozzles by bonding those substrates crystallized in a different direction and anisotropically etching them so that substrates bonded by one photograph transferring process may form different etching holes. This invention manufactures a diaphragm having a uniform thickness and a wide area by bonding two substrates different in the direction of crystallization or in the concentration of an impurity, removing a substrate of prescribed concentration and anisotropically etching only one substrate of the remaining substrates.

    Abstract translation: 本发明涉及通过各向异性蚀刻和基板的接合来制造微结构的方法，以便通过结合相同或不同的基板接合技术和选择性各向异性蚀刻技术来制造各种形式的机械功能的微结构。 本发明通过将一个衬底粘结在不同于结晶方向的衬底上并以其各向异性蚀刻的方式制造棱锥形光学分配器或具有位于四边形柱上的锥体结构的光学分配器。 本发明通过将在不同方向上结晶的基片结合在一起，通过各向异性蚀刻它们来制造各种形状的喷嘴，使得通过一次照片转印工艺粘合的基板可以形成不同的蚀刻孔。 本发明通过粘合两个不同结晶方向的基板或杂质浓度，除去规定浓度的基板，并且各向异性蚀刻剩余基板的一个基板，制造具有均匀厚度和宽面积的隔膜。

    Fabricating method for silicon devices using a two step silicon etching process
    190.
    发明授权
    Fabricating method for silicon devices using a two step silicon etching process 失效
    使用两步硅蚀刻工艺的硅器件的制造方法

    公开(公告)号：US5006202A

    公开(公告)日：1991-04-09

    申请号：US533204

    申请日：1990-06-04

    Applicant: William G. Hawkins ,  Donald J. Drake ,  James F. O'Neill

    Inventor： William G. Hawkins ,  Donald J. Drake ,  James F. O'Neill

    IPC: B41J2/16 ,  B81B1/00 ,  C23F1/00 ,  C23F1/02 ,  H01L21/302 ,  H01L21/306 ,  H01L21/3065 ,  H01L21/308

    CPC classification number: B41J2/1642 ,  B41J2/1601 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1631 ,  B41J2/1645 ,  B81B1/004 ,  B81C1/00896 ,  H01L21/30608 ,  H01L21/3085 ,  B81B2201/052 ,  B81C2201/053

    Abstract: Disclosed is a method of fabricating a precision etched, three dimensional device from a silicon wafer, wherein the etching is done from one side of the wafer using a two step silicon etching process. A two-sided deposition of a robust protective layer, such as polycrystalline silicon, is placed over a two-sided deposition of a chemical masking layer such as silicon dioxide. The two layers are concurrently patterned with first and second sets of vias on one side of the wafer, while the opposite side is protected by the protective layer. The protective layer is removed to permit deposition of a second masking layer such as silicon nitride, followed by deposition of a second protective layer. Again, the second protective layer prevents damage to the fragile second masking layer on the wafer backside while its frontside is patterned with a similar set of vias aligned with the first set of vias in the first masking layer. This similar set of vias is sequentially formed in both the second protective layer and the underlying second masking layers. Then the wafer is placed in an etchant bath so that the first set of recesses is anisotropically etched in the wafer frontside side. Next, the second protective layer and second masking layer are removed to permit anisotropic etching of the second set of recesses through the second set of vias in the first masking layer. If the protective layer is polycrystalline silicon, it is concurrently etch-removed during the initial etching of the silicon wafer.

    Abstract translation: 公开了一种从硅晶片制造精密蚀刻的三维器件的方法，其中使用两步硅蚀刻工艺从晶片的一侧进行蚀刻。 坚固的保护层（例如多晶硅）的双面沉积置于诸如二氧化硅的化学掩蔽层的双面沉积上。 两层同时用晶片一侧的第一组和第二组通孔构图，而相对侧被保护层保护。 去除保护层以允许沉积诸如氮化硅的第二掩蔽层，随后沉积第二保护层。 再次，第二保护层防止损坏晶片背面上的脆弱的第二掩蔽层，同时其前侧用与第一掩蔽层中的第一组通孔对准的相似的一组通孔构图。 在第二保护层和下面的第二掩蔽层中顺序地形成这种类似的通孔。 然后将晶片放置在蚀刻剂浴中，使得第一组凹陷在晶片前侧被各向异性地蚀刻。 接下来，去除第二保护层和第二掩蔽层，以允许通过第一掩模层中的第二组通孔对第二组凹陷进行各向异性蚀刻。 如果保护层是多晶硅，则在硅晶片的初始蚀刻期间同时进行蚀刻去除。

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