中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

23 records (took 0.029 seconds)

    Circuit board structure, and method for manufacturing same
    11.
    发明专利
    Circuit board structure, and method for manufacturing same 审中-公开
    电路板结构及其制造方法

    公开(公告)号：JP2007221089A

    公开(公告)日：2007-08-30

    申请号：JP2006271098

    申请日：2006-10-02

    Applicant: Phoenix Precision Technology Corp ,  全懋精密科技股▲分▼有限公司

    Inventor： HSU SHIH-PING ,  GAN GARIN

    IPC: H05K3/46 ,  H01L23/12

    CPC classification number: H05K3/465 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0041 ,  H05K3/045 ,  H05K3/107 ,  H05K3/4602 ,  H05K3/4661 ,  H05K2201/0166

    Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing a circuit board structure that enhances adhesion between a circuit and a dielectric layer. SOLUTION: A core board coated with at least a first circuit layer is provided, and a dielectric layer is formed on the surface of the core board. First and second openings are formed on the dielectric layer, and an electrode pad of the first circuit layer is exposed from the second opening, and then a metal layer is formed to cover the surface of the dielectric layer and the first and second openings. Subsequently, the metal layer is removed from the surface of the dielectric layer, and a second circuit layer is formed on the first opening of the dielectric layer, and then a conductive structure electrically connected to the first circuit layer is formed on the second opening. COPYRIGHT: (C)2007,JPO&INPIT

    Abstract translation: 要解决的问题：提供一种制造电路板结构的方法，其增强了电路和电介质层之间的粘附性。 提供涂覆有至少第一电路层的芯板，并且在芯板的表面上形成介电层。 第一和第二开口形成在电介质层上，并且第一电路层的电极焊盘从第二开口露出，然后形成金属层以覆盖电介质层和第一和第二开口的表面。 随后，从电介质层的表面除去金属层，在电介质层的第一开口形成第二电路层，然后在第二开口上形成与第一电路层电连接的导电结构。 版权所有（C）2007，JPO＆INPIT

    Pre-solder structure of semiconductor package substrate and its manufacturing method
    12.
    发明专利
    Pre-solder structure of semiconductor package substrate and its manufacturing method 审中-公开
    半导体封装基板的预焊结构及其制造方法

    公开(公告)号：JP2005217388A

    公开(公告)日：2005-08-11

    申请号：JP2004217626

    申请日：2004-07-26

    Applicant: Phoenix Precision Technology Corp ,  全懋精密科技股▲分▼有限公司

    Inventor： CHANG RUEI-CHIH ,  HU CHU-CHIN

    IPC: H01L21/44 ,  H01L21/60 ,  H01L23/48 ,  H01L23/498 ,  H01L23/52 ,  H01L29/40 ,  H05K3/34 ,  H05K3/40

    CPC classification number: H05K3/4007 ,  H01L23/49816 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/1147 ,  H01L2224/13109 ,  H01L2224/13609 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/14 ,  H05K3/3473 ,  H05K2201/0367 ,  H05K2201/09436 ,  H05K2203/043 ,  H05K2203/054 ,  H05K2203/0723 ,  H01L2224/29099 ,  H01L2224/05599

    Abstract: PROBLEM TO BE SOLVED: To provide the pre-solder structure of a semiconductor package substrate, for which the amount of solder material used can be reduced, the penetration and bridge formation of solder material can be avoided, and the pitch of electric connection pads can be reduced, thereby permitting fine pitch. SOLUTION: This invention is equipped with the semiconductor package substrate where multiple electric connection pads are formed at least on its front surface. The semiconductor package substrate is the one for which the prestage circuit pattern process has been completed. An insulating protective layer is formed on the front surface of the substrate. The insulating protective layer has multiple apertures so that the electric connection pads may be exposed. After that, a conductive layer is formed on the front surface of the insulating protective layer and the apertures. As a pattern masking layer is formed in the conductive layer, part of the conductive layers are coated and the apertures for electrodepositing are restricted. Finally, electrodepositing formation of conductive pillars and solder material is performed one by one at the apertures on which electrodepositing is performed. After removing the resist layer, the conductive pillars and conductive layers that are not covered by solder material, a reflow soldering process is performed on the solder material, and a pre-solder bump which completely covers the front surface of the conductive pillars is formed. COPYRIGHT: (C)2005,JPO&NCIPI

    Abstract translation: 要解决的问题：为了提供半导体封装衬底的预焊结构，可以减少使用的焊料的量，可以避免焊料材料的穿透和桥形成，并且电气的间距 可以减小连接垫，从而允许细间距。 解决方案：本发明配备有至少在其前表面上形成多个电连接焊盘的半导体封装基板。 半导体封装基板是预备电路图案处理已经完成的基板。 在基板的前表面上形成绝缘保护层。 绝缘保护层具有多个孔，使得电连接垫可能暴露。 之后，在绝缘保护层的前表面和孔上形成导电层。 由于在导电层中形成图形掩模层，所以部分导电层被涂覆，并且用于电沉积的孔被限制。 最后，在进行电沉积的孔上逐个进行导电柱和焊料的电沉积形成。 在除去抗蚀剂层之后，未被焊料材料覆盖的导电柱和导电层进行回流焊接工艺，并且形成完全覆盖导电柱前表面的预焊凸块。 版权所有（C）2005，JPO＆NCIPI

    Multilayer circuit board with fine pitch and fabricating method thereof
    13.
    发明专利
    Multilayer circuit board with fine pitch and fabricating method thereof 审中-公开
    多层电路板及其制作方法

    公开(公告)号：JP2007324559A

    公开(公告)日：2007-12-13

    申请号：JP2006266329

    申请日：2006-09-29

    Applicant: Phoenix Precision Technology Corp ,  全懋精密科技股▲ふん▼有限公司

    Inventor： HSU SHIH-PING

    IPC: H05K3/46

    CPC classification number: H05K3/465 ,  H05K3/0023 ,  H05K3/045 ,  H05K3/107 ,  H05K2201/0195 ,  H05K2203/054

    Abstract: PROBLEM TO BE SOLVED: To provide a method for fabricating a multilayer circuit board, wherein the accuracy of fine pitches is improved, fabricating processes are simplified and cost is reduced.
    SOLUTION: The method includes steps for providing a core circuit board on which a plurality of conductive pads are formed, forming a first dielectric layer on the surface of the core circuit board, forming a second dielectric layer on the surface of the first dielectric layer, forming a plurality of pattern openings on the second dielectric layer, forming a plurality of vias on positions of the first dielectric layer, which correspond to the pattern openings corresponding to the conductive pads, forming a seed layer on the surface of the second dielectric layer, the pattern openings and the vias, electroplating a conductive metal layer on the seed layer to form conductive circuits in respective pattern openings, forming a conductive via in each via, removing the conductive metal layer electroplated on the surface of the second dielectric layer and the seed layer, and separating the conductive circuit in each pattern opening.
    COPYRIGHT: (C)2008,JPO&INPIT

    Abstract translation: 要解决的问题：为了提供一种制造多层电路板的方法，其中精细间距的精度提高，制造工艺简化并且成本降低。 解决方案：该方法包括提供其上形成有多个导电焊盘的芯电路板的步骤，在芯电路板的表面上形成第一电介质层，在第一电介质的表面上形成第二电介质层 电介质层，在所述第二电介质层上形成多个图形开口，在与所述导电焊盘相对应的所述图案开口对应于所述第一电介质层的位置上形成多个通孔，在所述第二电介质层的表面上形成种子层 电介质层，图形开口和通孔，在种子层上电镀导电金属层，以在各个图案开口中形成导电电路，在每个通孔中形成导电通孔，去除电镀在第二介电层表面上的导电金属层 和种子层，并且在每个图案开口中分离导电电路。 版权所有（C）2008，JPO＆INPIT

    Circuit board structure
    14.
    发明专利
    Circuit board structure 审中-公开
    电路板结构

    公开(公告)号：JP2007214568A

    公开(公告)日：2007-08-23

    申请号：JP2007028079

    申请日：2007-02-07

    Applicant: Phoenix Precision Technology Corp ,  全懋精密科技股▲分▼有限公司

    Inventor： HSU SHIH-PING

    IPC: H05K3/46

    CPC classification number: H05K3/4602 ,  H05K3/423 ,  H05K3/427 ,  H05K2201/0394 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/10378 ,  H05K2203/0733 ,  H05K2203/1152 ,  H05K2203/1581 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165

    Abstract: PROBLEM TO BE SOLVED: To provide a method of manufacturing a circuit board structure capable of avoiding the creation of an electrode pad and an increase in wiring space, and capable of forming high-density wiring on a required circuit board. SOLUTION: A core board 21 is prepared on which a plurality of opening holes are formed. A conductive pillar 241 is formed in the opening hole on the core board 21. A dielectric layer 26 is formed on both the surfaces of the core board 21 each. An opening hole 261 is formed at a place corresponding to the conductive pillar 241 of the core board 21 in the dielectric layer 26. A wiring layer 27 is formed on the surface of the dielectric layer 26. A conductive structure 271 is formed in the opening hole 261 of the dielectric layer 26. The conductive structure 271 is connected to the conductive pillar 241 electrically. COPYRIGHT: (C)2007,JPO&INPIT

    Abstract translation: 要解决的问题：提供一种制造能够避免电极焊盘的产生和布线空间增加并且能够在所需电路板上形成高密度布线的电路板结构的方法。 解决方案：准备在其上形成有多个开孔的芯板21。 导电柱241形成在芯板21上的开孔中。电介质层26分别形成在芯板21的两表面上。 在与电介质层26中的芯板21的导电柱241对应的位置处形成开口孔26.布线层27形成在电介质层26的表面上。导电结构271形成在开口 电介质层26的孔261.导电结构271电连接到导电柱241。 版权所有（C）2007，JPO＆INPIT

    Manufacturing method of circuit board having conductive structure
    15.
    发明专利
    Manufacturing method of circuit board having conductive structure 审中-公开
    具有导电结构的电路板的制造方法

    公开(公告)号：JP2007214534A

    公开(公告)日：2007-08-23

    申请号：JP2006257613

    申请日：2006-09-22

    Applicant: Phoenix Precision Technology Corp ,  全懋精密科技股▲分▼有限公司

    Inventor： HSU SHIH-PING ,  TANG SUO-HSIA ,  WANG YING-TUNG ,  HU WEN HUNG ,  SHIH CHAO-WEN

    IPC: H05K3/24 ,  H01L23/12 ,  H05K3/18 ,  H05K3/34

    CPC classification number: H05K3/3484 ,  H05K1/112 ,  H05K3/1216 ,  H05K3/243 ,  H05K3/3473 ,  H05K2201/0391 ,  H05K2201/09436 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2203/054 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49165

    Abstract: PROBLEM TO BE SOLVED: To provide a manufacturing method of a circuit board having a different conductive structure for performing different electrical connection depending on electrode pads. SOLUTION: In the circuit board 30, first and second electrode pads 301, 302 are provided on a first surface, and a third electrode pad 303 is provided on a second surface. An insulating protective layer is formed on both the surfaces; a plurality of openings for exposing the first, second, and third electrode pads 301, 302, 302 are formed; a conductive layer 31 is formed on the surface of the first insulation protective layer; a resist layer is formed on both the surfaces; a plurality of openings for exposing the conductive layer 31 on the surface of the first and second electrode pads 301, 302 are formed; a first conductive structure 33 is formed on the conductive layer 31 on the surface of the first and second exposed electrode pads 301, 302 by electrical plating; the resist layer and the conductive layer 31 are removed for covering the resist layer; and a second conductive structure 34 is formed on the surface of the conductive layer 31 on the surface of the second electrode pad 302, and on the surface of the third electrode pad 303 by stencil printing. COPYRIGHT: (C)2007,JPO&INPIT

    Abstract translation: 要解决的问题：提供具有不同导电结构的电路板的制造方法，用于根据电极焊盘进行不同的电连接。 解决方案：在电路板30中，第一和第二电极焊盘301,302设置在第一表面上，第三电极焊盘303设置在第二表面上。 在两个表面上形成绝缘保护层; 形成用于暴露第一，第二和第三电极焊盘301,302,302的多个开口; 在第一绝缘保护层的表面上形成导电层31; 在两个表面上形成抗蚀剂层; 形成用于暴露第一和第二电极焊盘301,302的表面上的导电层31的多个开口; 通过电镀在第一和第二暴露电极焊盘301,302的表面上的导电层31上形成第一导电结构33; 去除抗蚀剂层和导电层31以覆盖抗蚀剂层; 并且在第二电极焊盘302的表面上的导电层31的表面上形成第二导电结构34，并且通过模版印刷在第三电极焊盘303的表面上形成第二导电结构34。 版权所有（C）2007，JPO＆INPIT

    Circuit board structure and its dielectric layer structure
    16.
    发明专利
    Circuit board structure and its dielectric layer structure 审中-公开
    电路板结构及其电介质层结构

    公开(公告)号：JP2007116154A

    公开(公告)日：2007-05-10

    申请号：JP2006280281

    申请日：2006-10-13

    Applicant: Phoenix Precision Technology Corp ,  全懋精密科技股▲分▼有限公司

    Inventor： HSU SHIH-PING

    IPC: H05K3/46 ,  H05K3/38

    CPC classification number: H05K3/381 ,  H05K1/0373 ,  H05K3/4661 ,  H05K2201/0215 ,  H05K2201/0224 ,  H05K2203/0315

    Abstract: PROBLEM TO BE SOLVED: To provide a circuit board structure which contains bonding particles utilized to increase the bonding strength between the circuit structure and a dielectric layer for enhancing the accuracy of the fine-pattern circuit production process, and to provide its dielectric layer structure.
    SOLUTION: A dielectric layer structure of a circuit board of the present invention comprises at least one dielectric layer and multiple bonding particles. The multiple bonding particles are metal fine particles which are charged in the dielectric layer, dispersed uniformly, and each of which is covered with an insulating film. The dielectric layer structure can be applied to a circuit board. The circuit board structure comprises a core substrate, a dielectric layer containing bonding particles, and a circuit structure formed on the dielectric layer. The bonding particles are utilized to increase the bonding strength between the circuit structure and the dielectric layer, thereby enhancing the accuracy of the production process of the fine-pattern circuit of the circuit board.
    COPYRIGHT: (C)2007,JPO&INPIT

    Abstract translation: 要解决的问题：提供一种电路板结构，其包含用于增加电路结构和电介质层之间的结合强度的粘结颗粒，以提高精细图案电路制造工艺的精度，并提供其电介质 层结构。 解决方案：本发明的电路板的电介质层结构包括至少一个电介质层和多个结合颗粒。 多个结合粒子是在电介质层中被充分均匀分散的金属微粒，并且被绝缘膜覆盖。 电介质层结构可以应用于电路板。 电路板结构包括芯基板，包含粘合颗粒的电介质层和形成在电介质层上的电路结构。 结合粒子用于增加电路结构和电介质层之间的接合强度，从而提高电路板的精细图案电路的制造工艺的精度。 版权所有（C）2007，JPO＆INPIT

    Wiring board having identifiable data and manufacturing method of the wiring board
    19.
    发明专利
    Wiring board having identifiable data and manufacturing method of the wiring board 有权
    具有标识数据的接线板和接线板的制造方法

    公开(公告)号：JP2005311281A

    公开(公告)日：2005-11-04

    申请号：JP2004228135

    申请日：2004-08-04

    Applicant: Phoenix Precision Technology Corp ,  全懋精密科技股▲分▼有限公司

    Inventor： HSU SHIH-PING ,  CHEN SHANG-WEI ,  TANG SUO-HSIA ,  SHIH CHAO-WEN

    IPC: G06K1/00 ,  H05K1/02 ,  H05K3/00 ,  H05K3/10 ,  H05K3/40 ,  H05K3/46

    CPC classification number: H05K1/0266 ,  H05K1/0269 ,  H05K3/107 ,  H05K3/4644 ,  H05K2201/09781 ,  H05K2201/09927 ,  H05K2201/09936

    Abstract: PROBLEM TO BE SOLVED: To provide a wiring board, having traces or identifiable data, starting from the halfway point of a manufacturing process of wiring board products to the final step in the process, and to provide a manufacturing method of the wiring board.
    SOLUTION: The manufacturing method of a wiring board has a step of preparing a wiring board, having an insulating layer which has a free space that is not used at least for a layout of wiring within the layer, a step of forming a plurality of openings in the free space of the insulating layer, and a step of forming a patterned wiring layer on a surface of the insulating layer and then forming metallically identifiable data in the openings in the free space. Thus, a wiring board, having traces or identifiable data and a manufacturing method of the wiring board, can be provided.
    COPYRIGHT: (C)2006,JPO&NCIPI

    Abstract translation: 要解决的问题：为了提供具有迹线或可识别数据的布线板，从布线板产品的制造过程的中途开始到该工艺的最后步骤，并且提供布线的制造方法 板。 解决方案：布线板的制造方法具有制备布线板的步骤，该布线板具有绝缘层，该绝缘层至少具有至少用于层内布线布局的自由空间，形成 在绝缘层的自由空间中的多个开口，以及在绝缘层的表面上形成图案化布线层，然后在自由空间的开口中形成金属识别数据的步骤。 因此，可以提供具有迹线或可识别数据的布线板以及布线板的制造方法。 版权所有（C）2006，JPO＆NCIPI

Patent Agency Ranking