전치왜곡 선형화 장치
    12.
    发明公开
    전치왜곡 선형화 장치 失效
    预测线性化器

    公开(公告)号:KR1020110021044A

    公开(公告)日:2011-03-04

    申请号:KR1020090078613

    申请日:2009-08-25

    CPC classification number: H03F1/3241 H03F1/3276

    Abstract: PURPOSE: A predistortion linearizer is provided to reduce the size of a non-linear power amplifier by increasing the integration of a circuit. CONSTITUTION: A serial predistortion linearization system(201) improves the linearity of a nonlinear amplifier by generating a signal which has the same size of a distortion signal while having the opposite phase to the distortion signal. A first resistor(202) is connected between the input terminal and the output terminal of the serial predistortion linearization system. A second resistor(203) is interposed between the input terminal of the input terminal of the serial predistortion linearization system and the ground. A third resistor(204) is installed between the output terminal and the ground of the serial predistortion linearization system. A power amplifier(205) is a nonlinear amplifier connected to the output terminal of the serial predistortion linearization system.

    Abstract translation: 目的:提供一种预失真线性化器,通过增加电路的积分来减小非线性功率放大器的尺寸。 构成:串行预失真线性化系统(201)通过产生具有与失真信号相反的相位的失真信号的大小的信号来提高非线性放大器的线性度。 第一电阻(202)连接在串行预失真线性化系统的输入端和输出端之间。 在串行预失真线性化系统的输入端子的输入端子与地之间插入第二电阻器(203)。 第三电阻器(204)安装在串行预失真线性化系统的输出端子和地之间。 功率放大器(205)是连接到串行预失真线性化系统的输出端的非线性放大器。

    튜너블 배리어를 구비한 그래핀 트랜지스터
    16.
    发明公开
    튜너블 배리어를 구비한 그래핀 트랜지스터 审中-实审
    石墨晶体管,包括可调壁垒

    公开(公告)号:KR1020150089742A

    公开(公告)日:2015-08-05

    申请号:KR1020140010721

    申请日:2014-01-28

    CPC classification number: H01L29/1606 H01L29/78

    Abstract: 튜너블배리어를구비한그래핀트랜지스터가개시된다. 개시된그래핀트랜지스터는반도체기판상에배치된절연박막과, 상기절연박막상의그래핀층과, 상기그래핀층의일단부와연결된제1전극과, 상기그래핀층의타단부로부터이격되며상기반도체기판과접촉하는제2전극과, 상기그래핀층상의게이트전극을포함한다. 상기반도체기판및 상기그래핀층사이에튜너블에너지배리어가형성된다.

    Abstract translation: 公开了一种包括可调屏障的石墨烯晶体管。 所公开的石墨烯晶体管包括布置在半导体衬底上的绝缘薄膜; 绝缘薄膜上的石墨烯层; 连接到所述石墨烯层的一端的第一电极; 与石墨烯层的另一端分离并与半导体基板接触的第二电极; 和石墨烯层上的栅电极。 在半导体衬底和石墨烯层之间形成能量势垒。

    전치왜곡 선형화 장치
    17.
    发明公开
    전치왜곡 선형화 장치 失效
    预测线性化器

    公开(公告)号:KR1020110021045A

    公开(公告)日:2011-03-04

    申请号:KR1020090078614

    申请日:2009-08-25

    CPC classification number: H03F1/3241 H03F1/3276

    Abstract: PURPOSE: A predistortion linearizer is provided to increase the integration of a circuit by using a simple circuit instead of an attenuator to control the size of a distortion signal. CONSTITUTION: A parallel predistortion linearization system(201) improves the linearity of a nonlinear amplifier by generating a signal which has the same size of a distortion signal while having the opposite phase to the distortion signal. A first resistor(202) is connected between the input terminal and the output terminal of the parallel predistortion linearization system. A second resistor(203) is connected to one end of the first resistor and is interposed between the output terminal of the parallel predistortion linearization system and the ground. A power amplifier(204) is comprised of a nonlinear amplifier which is connected between the input terminal of the signal and the other terminal of the first resistor.

    Abstract translation: 目的:提供一种预失真线性化电路,通过使用简单的电路来增加电路的积分,而不是衰减器来控制失真信号的大小。 构成:并行预失真线性化系统(201)通过产生具有与失真信号相反的相位的失真信号的大小的信号来提高非线性放大器的线性度。 第一电阻器(202)连接在并行预失真线性化系统的输入端子和输出端子之间。 第二电阻器(203)连接到第一电阻器的一端并插入在并联预失真线性化系统的输出端子和地之间。 功率放大器(204)由连接在信号的输入端和第一电阻的另一端之间的非线性放大器组成。

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