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公开(公告)号：KR1020150049975A
公开(公告)日：2015-05-08
申请号：KR1020130131224
申请日：2013-10-31
Applicant: 삼성전기주식회사
CPC classification number: H01L2224/48091 , H01L2224/48137 , H01L2224/73265 , H01L23/49811 , H01L21/52 , H01L23/02 , H01L23/28 , H01L24/28 , H01L24/44 , H01L2924/00014
Abstract: 본발명의일 실시예에따른반도체패키지는반도체부품이실장된기판, 상기기판상에위치하며, 슬롯부를갖는상판, 상기상판의양측과결합되는하우징케이스및 일측은상기기판과접합되며, 타측은상기슬롯부에체결되는체결부를포함하는핀을포함한다.
Abstract translation: 根据本发明实施例的半导体封装包括：安装有半导体部件的基板; 上板，其设置在所述基板上并具有槽部; 壳体，其连接到所述上板的两侧; 以及紧固部，其一端安装在基板上，另一端固定在槽部上。
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公开(公告)号：KR101502668B1
公开(公告)日：2015-03-13
申请号：KR1020120146445
申请日：2012-12-14
Applicant: 삼성전기주식회사
IPC: H01L23/48 , H01L25/065
CPC classification number: H01L2224/48091 , H01L2224/48137 , H01L2224/73265 , H01L2924/13034 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/00014 , H01L2924/00
Abstract: 본 발명의 일 실시 예에 따른 전력 모듈 패키지는 외부접속단자, 상기 외부접속단자의 일단이 삽입 체결되는 체결수단이 두께 방향으로 관통하여 형성된 기판 및 상기 기판 일면에 실장된 반도체칩을 포함한다.
Abstract translation: 根据本发明实施例的功率模块封装包括：板，其具有外部连接端子;外部连接端子的一端插入穿过板的固定装置;以及安装在板的一个表面上的半导体芯片。
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公开(公告)号：KR1020150021250A
公开(公告)日：2015-03-02
申请号：KR1020130098372
申请日：2013-08-20
Applicant: 삼성전기주식회사
CPC classification number: H01L21/50 , H01L21/4853 , H01L21/565 , H01L23/142 , H01L23/145 , H01L23/3121 , H01L23/49811 , H01L23/49827 , H01L24/24 , H01L24/73 , H01L24/82 , H01L25/0657 , H01L25/105 , H01L2021/6027 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/131 , H01L2224/16225 , H01L2224/16245 , H01L2224/24226 , H01L2224/24246 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/73257 , H01L2224/73265 , H01L2224/73267 , H01L2224/92244 , H01L2225/0651 , H01L2225/06568 , H01L2225/1023 , H01L2225/1029 , H01L2225/1035 , H01L2225/1058 , H01L2924/12042 , H01L2924/1305 , H01L2924/13055 , H01L2924/14 , H01L2924/15311 , H01L2924/1533 , H01L2924/15787 , H01L2924/181 , H01L2924/014 , H01L2924/00012 , H01L2924/00
Abstract: 본 발명은 반도체 패키지, 반도체 패키지 제조 방법 및 적층형 반도체 패키지에 관한 것이다. 본 발명의 실시 예에 따른 반도체 패키지는 제1 회로층이 형성된 베이스 기판, 베이스 기판에 형성된 반도체 소자, 베이스 기판에 형성되어 제1 회로층 및 반도체 소자를 둘러싸도록 형성된 몰딩부, 제1 회로층에 형성되며, 몰딩부를 관통하도록 형성된 제1 비아 및 몰딩부 상면에 형성되며, 제1 비아와 일체형으로 형성된 제2 회로층을 포함한다.
Abstract translation: 本发明涉及一种半导体封装，半导体封装的制造方法和堆叠型半导体封装。 根据本发明的实施例的半导体封装包括：具有第一电路层的基底基板，形成在基底基板上的半导体器件，形成在bae基板上以围绕第一电路层的模制部分和半导体层 形成在第一电路层中并穿透模制部分的第一通孔，以及形成在模制部件的上侧和第一通孔上并与第一通孔集成的第二电路层。
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公开(公告)号：KR1020130005811A
公开(公告)日：2013-01-16
申请号：KR1020110067437
申请日：2011-07-07
Applicant: 삼성전기주식회사
CPC classification number: H01L23/66 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L21/56 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/78 , H01L23/3142 , H01L23/49822 , H01L23/49827 , H01L23/49838 , H01L23/5226 , H01L23/5389 , H01L24/19 , H01L24/73 , H01L24/96 , H01L24/97 , H01L25/0657 , H01L25/16 , H01L2223/6616 , H01L2223/6677 , H01L2223/6683 , H01L2224/0401 , H01L2224/04105 , H01L2224/16225 , H01L2224/32145 , H01L2224/48227 , H01L2224/73265 , H01L2224/97 , H01L2924/01029 , H01L2924/12042 , H01L2924/15787 , H01L2924/181 , H01L2924/3011 , H05K1/185 , H05K2203/061 , H01L2224/81 , H01L2924/00 , H01L2924/00012
Abstract: PURPOSE: A semiconductor package and a manufacturing method thereof are provided to minimize a loss between an antenna part and a semiconductor chip by minimizing an electric connection distance between the semiconductor chip and the antenna part. CONSTITUTION: An encapsulating unit(20) encapsulates a semiconductor chip(10). A substrate part(30) is formed on one side of the encapsulating unit and includes a top substrate(30a) formed on the upper side of the encapsulating unit and a bottom substrate(30b) formed on the lower side of the encapsulating unit. An antenna part(40) is electrically connected to the semiconductor chip. A via connection part(25) passes through the encapsulating unit.
Abstract translation: 目的：提供半导体封装及其制造方法，以通过使半导体芯片与天线部分之间的电连接距离最小化来最小化天线部分与半导体芯片之间的损耗。 构成：封装单元（20）封装半导体芯片（10）。 衬底部分（30）形成在封装单元的一侧上，并且包括形成在封装单元的上侧的顶部衬底（30a）和形成在封装单元的下侧的底部衬底（30b）。 天线部分（40）电连接到半导体芯片。 通孔连接部件（25）穿过封装单元。
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公开(公告)号：KR101208241B1
公开(公告)日：2012-12-04
申请号：KR1020110068930
申请日：2011-07-12
Applicant: 삼성전기주식회사
CPC classification number: H01L23/66 , H01L23/3121 , H01L2223/6677 , H01L2224/48195 , H01L2224/48227 , H01L2924/3025 , H01Q1/2283 , H01Q9/0414 , H01L2924/00
Abstract: PURPOSE: A semiconductor package is provided to minimize an electrical link distance of a main antenna and a semiconductor chip by soldering the main antenna and the semiconductor chip together. CONSTITUTION: A main antenna(42) is arranged to be adjacent to a semiconductor chip. A sealing unit(20) solders the semiconductor chip and the main antenna together. An auxiliary antenna(45) is formed at an external side of the sealing unit. The auxiliary antenna forms coupling with the main antenna. The main antenna and the auxiliary antenna transmit and receive high frequencies of a millimeter band using the coupling.
Abstract translation: 目的：提供半导体封装，通过将主天线和半导体芯片焊接在一起来最小化主天线和半导体芯片的电连接距离。 构成：主天线（42）布置成与半导体芯片相邻。 密封单元（20）将半导体芯片和主天线焊接在一起。 辅助天线（45）形成在密封单元的外侧。 辅助天线与主天线形成耦合。 主天线和辅助天线使用耦合发射和接收毫米波段的高频。
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Patent Agency Ranking
公开(公告)号：KR1020080109171A
公开(公告)日：2008-12-17
申请号：KR1020070057176
申请日：2007-06-12
Applicant: 삼성전기주식회사
CPC classification number: H01L2224/48091 , H01L2924/15311 , H01L2924/00014
Abstract: A metal substrate, a lead frame, and a semiconductor package and a manufacturing method thereof are provided to increase the efficiency of the manufacturing process by adamantly supporting the die pad and the lead without the tie bar and the dam bar. A metal substrate(10) comprises a plurality of metal terminals(11) and the oxidized portion(12). The oxidized portion is electrically separated while a plurality of metal terminals are supported. The oxidized portion is interposed between a plurality of metal terminals. The thickness of the oxidized portion is smaller than the thickness of the metal terminal. The terminal is made of the material including the aluminium(Al).
Abstract translation: 提供金属基板，引线框架和半导体封装及其制造方法，以通过坚固地支撑裸片焊盘和引线而不用连接条和阻挡条来提高制造工艺的效率。 金属基板（10）包括多个金属端子（11）和氧化部分（12）。 在支撑多个金属端子的同时，氧化部分被电分离。 氧化部分介于多个金属端子之间。 氧化部分的厚度小于金属端子的厚度。 端子由包括铝（Al）的材料制成。
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公开(公告)号：KR1020160010246A
公开(公告)日：2016-01-27
申请号：KR1020140119231
申请日：2014-09-05
Applicant: 삼성전기주식회사
IPC: H01L25/065 , H01L23/48 , H01L23/28
CPC classification number: H01L24/97 , H01L2224/16227 , H01L2224/48091 , H01L2224/48227 , H01L2224/97 , H01L2924/15311 , H01L2924/19106 , H01L2224/81 , H01L2224/85
Abstract: 본발명은몰드부에외부단자를형성할수 있는전자소자모듈및 그제조방법에관한것이다. 이를위한본 발명의실시예에따른전자소자모듈은, 적어도하나의외부접속용전극과상기외부접속용전극으로부터일정거리연장되어형성되는도금선을구비하는기판, 상기에실장되는적어도하나의전자소자, 상기전자소자를밀봉하는몰드부; 및상기외부접속용전극에서연장되어형성되며상기몰드부를관통하는형태로상기몰드부내에배치되는다수의접속도체를포함할수 있다.
Abstract translation: 本发明涉及能够在模具部件中形成外部端子的电气装置模块及其制造方法。 为此，根据本发明实施例的电子设备模块可以包括具有至少一个外部连接电极和从外部连接电极延伸一定距离的电镀线的基板; 安装在所述基板上的至少一个电子装置; 和用于密封电子设备的模具部件; 以及多个连接导体，其从外部连接电极延伸，并且穿过模具部件以布置在模具部件中。
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公开(公告)号：KR1020140077561A
公开(公告)日：2014-06-24
申请号：KR1020120146509
申请日：2012-12-14
Applicant: 삼성전기주식회사
IPC: H01L23/48 , H01L25/065
CPC classification number: H01L2224/45139 , H01L2224/48091 , H01L2224/73265 , H01L2924/13034 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/00014 , H01L2924/00
Abstract: A power module package, according to an embodiment of the present invention, comprises a substrate including an insulating layer and a first pad and a second pad formed on one surface; a semiconductor chip mounted to the first pad by a bonding layer formed on the upper part of the first pad; and an external connection terminal in which one end includes a conjugation unit for directly conjugating with the second pad and the other end is protruded to the outside.
Abstract translation: 根据本发明的实施例的功率模块封装包括：衬底，其包括绝缘层和形成在一个表面上的第一焊盘和第二焊盘; 半导体芯片，其通过形成在所述第一焊盘的上部的接合层安装到所述第一焊盘; 以及外部连接端子，其一端包括用于与第二焊盘直接共轭的共轭单元，另一端突出到外部。
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