公开(公告)号：KR1019980012039A

公开(公告)日：1998-04-30

申请号：KR1019960031250

申请日：1996-07-29

Applicant: 삼성전자주식회사

Inventor： 정대혁

IPC: H01L21/304

公开(公告)号：KR1020070010820A

公开(公告)日：2007-01-24

申请号：KR1020050065751

申请日：2005-07-20

Applicant: 삼성전자주식회사

Inventor： 이일상 ,  황인석 ,  정대혁 ,  추기연 ,  김인기

IPC: H01L21/304

Abstract: A wafer cleaning apparatus is provided to minimize generation of a vortex in replacing process liquid by a cleaning solution by adjusting an injection direction, an injection quantity and an injection rate of a plurality of cleaning solution injecting parts installed in the bottom surface of a receptacle. A plurality of wafers are received in a receptacle(110) whose upper part is open. A plurality of cleaning solution injecting parts(120) are formed on the bottom surface of the receptacle, extended to the lengthwise direction of the receptacle and including a plurality of nozzles. The cleaning solution injecting parts supply a cleaning solution for cleaning the wafers to the receptacle, separated from each other by a uniform interval and made of quartz or telfon. A plurality of driving parts(130) rotate the cleaning solution injecting parts with respect to the center axis of the extension direction of the cleaning solution injecting parts so as to adjust the direction of the cleaning solution supplied to the receptacle.

Abstract translation: 提供了一种晶片清洗装置，用于通过调整安装在容器的底面中的多个清洁溶液注入部件的喷射方向，喷射量和喷射速度来最小化由清洁溶液代替处理液体的涡流的产生。 多个晶片被容纳在上部打开的容器（110）中。 多个清洗液注入部件（120）形成在容器的底表面上，延伸到容器的长度方向并且包括多个喷嘴。 清洗液注入部件将用于清洁晶片的清洁溶液供给到容器，以均匀的间隔彼此分离，并由石英或天竺葵制成。 多个驱动部（130）相对于清洗液喷射部的延伸方向的中心轴旋转清洗液注入部，调整供给到容器的清洗液的方向。

公开(公告)号：KR1020070002233A

公开(公告)日：2007-01-05

申请号：KR1020050057649

申请日：2005-06-30

Applicant: 삼성전자주식회사

Inventor： 배진혜 ,  황인석 ,  정대혁 ,  이금주

IPC: H01L21/302

CPC classification number: G03F7/42 ,  H01L21/67034 ,  H01L21/6704

Abstract: An apparatus for manufacturing a semiconductor is provided to reduce generation of a water spot defect by performing a dry process in a state of keeping a wafer inclined. A process chamber(100) supports a wafer(10) where a photoresist is formed. Vaporized ozone is provided to the process chamber to remove the photoresist. The process chamber changes the photoresist into a water-soluble material by the vaporized ozone. A conveyer(110) conveys the wafer from the process chamber. A drying unit(120) makes the wafer conveyed by the conveyer have a tilt of 20 to 40 degrees. The drying unit removes the water-soluble material from the wafer. The drying unit repeatedly cleans and dries the wafer.

Abstract translation: 提供半导体制造装置，通过在保持晶片倾斜的状态下进行干法处理，减少水斑缺陷的产生。 处理室（100）支撑形成光致抗蚀剂的晶片（10）。 将蒸发的臭氧提供到处理室以除去光致抗蚀剂。 处理室通过蒸发的臭氧将光致抗蚀剂改变成水溶性材料。 输送机（110）从处理室传送晶片。 干燥单元（120）使得由输送机输送的晶片具有20至40度的倾斜度。 干燥装置从晶片上去除水溶性物质。 干燥单元反复清洁并干燥晶片。

公开(公告)号：KR1020070000235A

公开(公告)日：2007-01-02

申请号：KR1020050055800

申请日：2005-06-27

Applicant: 삼성전자주식회사

Inventor： 김광복 ,  황인석 ,  정대혁

IPC: H01L27/115

CPC classification number: H01L27/2463 ,  H01L21/28273 ,  H01L27/10882

Abstract: A method of manufacturing a non-volatile memory device is provided to simplify a semiconductor manufacturing process by forming simultaneously a bit line contact pad and a metal line contact pad. A first interlayer dielectric pattern(110) including a line type first opening(113) for covering a gate structure and exposing a common source line region of a substrate(100) and a second opening(115) for exposing a contact region of the substrate is formed on the substrate. A common source line(114) is formed within the first opening. A contact pad is formed within the second opening. A second interlayer dielectric pattern(120) including a third opening is formed on the common source line, the contact pad, and the first interlayer dielectric pattern. A wiring(128) is formed on the second interlayer dielectric pattern in order to be connected with the contact pad through the third opening.

Abstract translation: 提供一种制造非易失性存储器件的方法，以通过同时形成位线接触焊盘和金属线接触焊盘来简化半导体制造工艺。 第一层间电介质图案（110），包括用于覆盖栅极结构并暴露基板（100）的共同源极线区域的线型第一开口（113）和用于暴露基板的接触区域的第二开口（115） 形成在基板上。 公共源极线（114）形成在第一开口内。 接触垫形成在第二开口内。 在公共源极线，接触焊盘和第一层间电介质图案上形成包括第三开口的第二层间电介质图案（120）。 在第二层间电介质图案上形成布线（128），以便通过第三开口与接触垫连接。

公开(公告)号：KR100542738B1

公开(公告)日：2006-01-11

申请号：KR1020030051206

申请日：2003-07-25

Applicant: 삼성전자주식회사

Inventor： 여인준 ,  고용선 ,  황인석 ,  윤병문 ,  정대혁 ,  김경현

IPC: H01L21/304

CPC classification number: C11D11/0047 ,  C11D7/06 ,  C11D7/265

Abstract: 반도체 장치 세정액 및 이를 이용한 반도체 장치의 세정방법이 개시되어 있다. 반도체 장치 세정액은 암모니아수, 상기 암모니아수 보다 높은 비율의 초산 및 상기 초산 보다 높은 비율의 탈이온수로 이루어진다. 상기 세정액을 이용한 반도체 장치의 세정방법은 금속 패턴이 노출된 반도체 기판에 암모니아수, 초산 및 탈이온수로 이루어진 세정액을 제공하여 세정액막을 형성하고 상기 세정액막에 메가소닉 에너지를 제공한다. 상기 메가소닉 에너지, 상기 메가소닉 에너지에 의한 세정액 내의 기포 파열 에너지 및 상기 세정액의 화학적 작용에 의해 금속 패턴이 노출된 반도체 기판을 세정한다.

公开(公告)号：KR1020040076439A

公开(公告)日：2004-09-01

申请号：KR1020030011785

申请日：2003-02-25

Applicant: 삼성전자주식회사

Inventor： 정대혁 ,  이광욱 ,  여인준

IPC: H01L21/304

CPC classification number: H01L21/02052 ,  B08B3/12 ,  C11D7/08 ,  C11D11/0047 ,  C11D11/007 ,  C23G1/02 ,  H01L21/67028 ,  H01L21/67051 ,  H01L21/67057

Abstract: PURPOSE: A method for cleaning a substrate is provided to remove effectively contaminants from a substrate having a metal line by using a dilute sulphuric acid solution as a cleaning solution. CONSTITUTION: A substrate is loaded on a surface of a chuck(S31). The substrate is rotated at the predetermined speed(S33). A dilute sulphuric acid solution as a cleaning solution is provided on the substrate(S35). A megasonic is transferred to the substrate in order to remove particles from the substrate(S37). A rinsing process is performed on the surface of the substrate after the particles are removed from the substrate(S39). The substrate is dried by performing a dry process(S41).

Abstract translation: 目的：提供一种清洗基材的方法，通过使用稀硫酸溶液作为清洗溶液，有效地除去具有金属线的基材的污染物。 构成：将基板装载在卡盘的表面上（S31）。 基板以预定速度旋转（S33）。 在基板上设置作为清洗液的稀硫酸溶液（S35）。 将兆声波传送到基板以从基板去除颗粒（S37）。 在从基板除去颗粒之后，在基板的表面上进行漂洗处理（S39）。 通过干法进行干燥（S41）。

公开(公告)号：KR1019980012029A

公开(公告)日：1998-04-30

申请号：KR1019960031123

申请日：1996-07-29

Applicant: 삼성전자주식회사

Inventor： 권영민 ,  윤병문 ,  정대혁 ,  고용선

IPC: H01L21/304

公开(公告)号：KR1019980012025A

公开(公告)日：1998-04-30

申请号：KR1019960031060

申请日：1996-07-29

Applicant: 삼성전자주식회사

Inventor： 윤병문 ,  권영민 ,  정대혁

IPC: H01L21/304

公开(公告)号：KR100829594B1

公开(公告)日：2008-05-14

申请号：KR1020060098498

申请日：2006-10-10

Applicant: 삼성전자주식회사

Inventor： 성충기 ,  정대혁 ,  한명식

IPC: C09K3/14

CPC classification number: H01L21/31053 ,  C09G1/02 ,  C09K3/1463 ,  H01L27/115 ,  H01L27/11521

Abstract: A method for fabricating a semiconductor memory device is provided to improve uniformity in the thickness of a polysilicon layer and to reduce damages on the polysilicon layer caused by polishing particles by using a chemical mechanical slurry composition having a high polishing rate to a silicon oxide layer, thereby improving the reliability of the semiconductor device. A method for fabricating a semiconductor memory device comprises the steps of: forming a polysilicon pattern(108) on a semiconductor wafer(100); etching the wafer exposed to the polysilicon pattern to form trenches(109) on the wafer; forming a silicon oxide layer covering the polysilicon pattern with the trenches embedded therein; polishing the silicon oxide layer with a chemical mechanical polishing(CMP) slurry composition to expose the polysilicon pattern and to form a separator for a device, wherein the CMP slurry composition comprises 0.1-3.5 wt% of seria as a polishing agent, 0.01-0.10 wt% of a non-ionic surfactant adsorbed on the surface of the polysilicon layer during CMP to form a protective layer, 0.5-3.5 wt% of polyacrylic acid and the balance amount of water; and forming a structure having a gate dielectric and a conductive pattern on the wafer. In the CMP slurry composition, the non-ionic surfactant has a tri-block structure containing a first polyethylene oxide repeating unit, polypropylene oxide repeating unit and a second polyethylene oxide repeating unit, wherein each of the first polyethylene oxide and the second polyethylene oxide has a HLB(hydrophilic lipophilic balance) value of 10-15, and the polypropylene oxide has a HLB value of 28-32.

Abstract translation: 提供一种用于制造半导体存储器件的方法，以通过使用具有高抛光速率的氧化硅层的化学机械浆料组合物来改善多晶硅层的厚度的均匀性并减少由抛光颗粒引起的对多晶硅层的损伤， 从而提高半导体器件的可靠性。 一种用于制造半导体存储器件的方法包括以下步骤：在半导体晶片（100）上形成多晶硅图案（108）; 蚀刻暴露于多晶硅图案的晶片以在晶片上形成沟槽（109）; 形成覆盖多晶硅图案的氧化硅层，其中嵌有沟槽; 用化学机械抛光（CMP）浆料组合物抛光氧化硅层以暴露多晶硅图案并形成用于器件的隔板，其中CMP浆料组合物包含0.1-3.5重量％的作为抛光剂的丝网，0.01-0.10 在CMP期间吸附在多晶硅层的表面上的非离子表面活性剂的重量％形成保护层，0.5-3.5重量％的聚丙烯酸和余量的水; 以及在所述晶片上形成具有栅极电介质和导电图案的结构。 在CMP浆料组合物中，非离子表面活性剂具有包含第一聚环氧乙烷重复单元，聚环氧丙烷重复单元和第二聚环氧乙烷重复单元的三嵌段结构，其中第一聚环氧乙烷和第二聚环氧乙烷各自具有 HLB（亲水亲油平衡）值为10-15，聚环氧丙烷的HLB值为28-32。

公开(公告)号：KR1020060134234A

公开(公告)日：2006-12-28

申请号：KR1020050053756

申请日：2005-06-22

Applicant: 삼성전자주식회사

Inventor： 여인준 ,  황인석 ,  정대혁 ,  이금주

IPC: G03F1/76 ,  G03F7/20 ,  G03F7/26 ,  G03F7/00

Abstract: A method for fine patterning semiconductor printed circuit board is provided to form fine line-and-space having uniform masking area and opened area on the printed circuit board by forming first opening having first pattern width, first preliminary pattern having second pattern width, spacers on the first preliminary pattern side wall and second preliminary pattern in order. The method comprises the steps of: forming first preliminary pattern(106) with second pattern width while producing first opening with first pattern width; forming second opening while forming spacer(112) with pattern width at lower portion on side wall of the first preliminary pattern, which is identical to the second pattern width; forming second preliminary pattern(116) by using the same material of the first preliminary pattern in order to embed the second opening into the second preliminary pattern; forming first and second original patterns by partially etching the first and second preliminary patterns so that the lower portion of the second opening is partially exposed; and removing the spacer.

Abstract translation: 提供精细图案化半导体印刷电路板的方法，通过形成具有第一图案宽度的第一开口，具有第二图案宽度的第一初步图案，具有第二图案宽度的间隔件，以形成具有均匀掩蔽面积和印刷电路板上的开口面积的细小空间 第一初步模式侧壁和第二初步模式顺序。 该方法包括以下步骤：以第一图案宽度形成具有第二图案宽度的第一初步图案（106），同时产生第一开口; 形成第二开口，同时形成具有与第二图案宽度相同的第一初步图案的侧壁上的下部的图案宽度的间隔物（112） 通过使用与第一初步图案相同的材料形成第二初步图案（116），以将第二开口嵌入第二初步图案; 通过部分地蚀刻第一和第二预备图案使得第二开口的下部部分地露出来形成第一和第二原始图案; 并移除间隔物。